CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 102
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CY8C32_12
Manufacturer Part Number
CY8C32_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C32_12.pdf
(122 pages)
- Current page: 102 of 122
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11.8.3 Interrupt Controller
Table 11-60. Interrupt Controller AC Specifications
11.8.4 JTAG Interface
Table 11-61. JTAG Interface AC Specifications
Document Number: 001-56955 Rev. *N
f_TCK
T_TDI_setup
T_TMS_setup
T_TDI_hold
T_TDO_valid
T_TDO_hold
Notes
51. Based on device characterization (Not production tested).
52. f_TCK must also be no more than 1/3 CPU clock frequency.
Parameter
Parameter
TCK frequency
TDI setup before TCK high
TMS setup before TCK high
TDI, TMS hold after TCK high
TCK low to TDO valid
TDO hold after TCK high
Delay from interrupt signal input to ISR
code execution from ISR code
TDO
TDI
TMS
TCK
Description
Description
T_TDI_setup
T_TMS_setup
Figure 11-56. JTAG Interface Timing
[51]
T_TMS_hold
T_TDI_hold
3.3 V V
1.71 V V
T = 1/f_TCK max
T = 1/f_TCK max
T = 1/f_TCK max
Includes worse case completion of
longest instruction DIV with 6
cycles
(1/f_TCK)
DDD
DDD
Conditions
Conditions
5 V
< 3.3 V
T_TDO_valid
PSoC
(T/10) – 5
T_TDO_hold
Min
Min
T/4
T/4
T/4
®
–
–
–
–
3: CY8C32 Family
Typ
Typ
–
–
–
–
–
–
–
–
Data Sheet
14
Max
Max
7
2T/5
25
Page 102 of 122
[52]
–
–
–
–
[52]
Tcy CPU
Units
Units
MHz
MHz
ns
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