CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 106

• Manufacturer Part Number: CY8C32_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 11-70. kHzECO AC Specifications
11.9.5 External Clock Reference
Table 11-71. External Clock Reference AC Specifications
11.9.6 Phase–Locked Loop
Table 11-72. PLL DC Specifications
Table 11-73. PLL AC Specifications
Document Number: 001-56955 Rev. *N
F
T
I
Fpllin
Fpllout
Jperiod-rms Jitter (rms)
Notes
Parameter
Parameter
Parameter
DD
Parameter
56. Based on device characterization (Not production tested).
57. This specification is guaranteed by testing the PLL across the specified range using the IMO as the source for the PLL.
58. PLL input divider, Q, must be set so that the input frequency is divided down to the intermediate frequency range. Value for Q ranges from 1 to 16.
ON
Frequency
Startup time
External frequency range
Input duty cycle range
Input edge rate
PLL operating current
PLL input frequency
PLL intermediate frequency
PLL output frequency
Lock time at startup
[56]
Description
Description
Description
Description
[57]
[57]
[58]
High power mode
Measured at V
V
In = 3 MHz, Out = 24 MHz
Output of prescaler
IL
to V
[56]
IH
Conditions
Conditions
Conditions
Conditions
DDIO
/2
PSoC
Min
Min
0.5
30
Min
Min
–
–
0
24
–
1
1
–
–
®
3: CY8C32 Family
32.768
Typ
Typ
50
Typ
200
Typ
1
–
–
–
–
–
–
–
Data Sheet
Max
Max
33
70
Max
Max
250
250
–
–
–
Page 106 of 122
48
50
3
–
Units
Units
MHz
V/ns
Units
Units
kHz
MHz
MHz
MHz
%
µA
µs
ps
s