MPC8264 MOTOROLA [Motorola, Inc], MPC8264 Datasheet - Page 20

• Manufacturer Part Number: MPC8264
• Description: MPC826xA (HiP4) Family Hardware Specifications
• Manufacturer: MOTOROLA [Motorola, Inc]

1.3
To configure the main PLL multiplication factor and the core, CPM, and 60x bus frequencies, the
MODCK[1–3] pins are sampled while HRESET is asserted. Table 12 lists the eight basic configuration
modes. Table 13 lists the other modes that are available by using the configuration pin (RSTCONF) and
driving four bits from hardware configuration word on the data bus.
Note that the MPC8265 and the MPC8266 have two additional clocking modes—PCI agent and PCI host.
Refer to Section 1.3.2, “PCI Mode” on page 23 for information.
1.3.1
Table 12 describes default clock modes for the MPC826xA.
Table 13 describes all possible clock configurations when using the hard reset configuration sequence.
Note that basic modes are shown in boldface type. The frequencies listed are for the purpose of illustration
only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed
the frequency rating of the user’s device.
20
MODCK[1–3]
000
001
010
011
100
101
110
111
Clock Configuration Modes
Local Bus Mode
The UPM machine outputs change on the internal tick determined by the
memory controller programming; the AC specifications are relative to the
internal tick. Note that SDRAM and GPCM machine outputs change on
CLKin’s rising edge.
Clock configurations change only after POR is asserted.
Input Clock
Frequency
33 MHz
33 MHz
33 MHz
33 MHz
66 MHz
66 MHz
66 MHz
66 MHz
MPC826xA (HiP4) Family Hardware Specifications
CPM Multiplication
Table 12. Clock Default Modes
Factor
2.5
2.5
3
3
4
4
2
2
NOTE
NOTE
Frequency
100 MHz
100 MHz
133 MHz
133 MHz
133 MHz
133 MHz
166 MHz
166 MHz
CPM
Core Multiplication
Factor
2.5
2.5
4
5
4
5
3
3
Frequency
133 MHz
166 MHz
133 MHz
166 MHz
166 MHz
200 MHz
166 MHz
200 MHz
Core
MOTOROLA