MPC8264 MOTOROLA [Motorola, Inc], MPC8264 Datasheet - Page 19

• Manufacturer Part Number: MPC8264
• Description: MPC826xA (HiP4) Family Hardware Specifications
• Manufacturer: MOTOROLA [Motorola, Inc]

Figure 11 shows signal behavior in MEMC mode.
MOTOROLA
Memory controller signals
1:2, 1:3, 1:4, 1:5, 1:6
CLKin
CLKin
CLKin
PLL Clock Ratio
Generally, all MPC826xA bus and system output signals are driven from
the rising edge of the input clock (CLKin). Memory controller signals,
however, trigger on four points within a CLKin cycle. Each cycle is
divided by four internal ticks: T1, T2, T3, and T4. T1 always occurs at the
rising edge, and T3 at the falling edge, of CLKin. However, the spacing of
T2 and T4 depends on the PLL clock ratio selected, as shown in Table 11.
Figure 12 is a graphical representation of Table 11.
Figure 12. Internal Tick Spacing for Memory Controller Signals
1:2.5
1:3.5
T1
T1
T1
Table 11. Tick Spacing for Memory Controller Signals
CLKin
V_CLK
MPC826xA (HiP4) Family Hardware Specifications
T2
T2
T2
Figure 11. MEMC Mode Diagram
1/4 CLKin
3/10 CLKin
4/14 CLKin
Tick Spacing (T1 Occurs at the Rising Edge of CLKin)
T3
T3
T3
T2
NOTE
T4
T4
T4
1/2 CLKin
1/2 CLKin
1/2 CLKin
sp34/sp30
T3
Electrical and Thermal Characteristics
for 1:2, 1:3, 1:4, 1:5, 1:6
for 1:2.5
for 1:3.5
3/4 CLKin
8/10 CLKin
11/14 CLKin
T4
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