SAA7108AE PHILIPS [NXP Semiconductors], SAA7108AE Datasheet - Page 53
SAA7108AE
Manufacturer Part Number
SAA7108AE
Description
HD-CODEC
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.SAA7108AE.pdf
(197 pages)
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Philips Semiconductors
2004 Jun 29
HD-CODEC
(1) The inactive going edge of the V123 signal indicates whether the field is odd or even. If HREF is active during
The control signals listed above are available on pins RTS0, RTS1, XRH and XRV according to the following table:
For further information see programming section, Tables 171, 172 and 173.
HREF
F_ITU656
V123
VGATE
FID
NAME
the falling edge of V123, the field is ODD (field 1). If HREF is inactive during the falling edge of V123, the field
is EVEN. The specific position of the slope is dependent on the internal processing delay and may change a
few clock cycles from version to version.
single field counting
single field counting
ITU counting
ITU counting
F_ITU656
F_ITU656
V123
VGATE
V123
VGATE
CVBS
HREF
CVBS
HREF
FID
FID
(1)
(1)
RTS0 (PIN K13)
X
X
X
X
622
309
309
309
Fig.30 Vertical timing diagram for 50 Hz/625 line systems.
VSTO [ 8:0 ] = 134H
VSTO [ 8:0 ] = 134H
623
310
310
310
RTS1 (PIN L10)
624
311
311
311
625
312
312
312
X
X
X
X
313
313
1
1
314
XRH (PIN N2)
2
2
1
(a) 1st field
(b) 2nd field
53
315
X
3
3
2
316
4
4
3
XRV (PIN L5)
317
5
5
4
SAA7108AE; SAA7109AE
X
X
318
6
6
5
319
7
7
6
.. .
.. .
.. .
.. .
VSTA [ 8:0 ] = 15H
VSTA [ 8:0 ] = 15H
Product specification
335
22
22
22
336
MHB540
23
23
23
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