DAC1008D750HN NXP [NXP Semiconductors], DAC1008D750HN Datasheet - Page 75

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DAC1008D750HN

Manufacturer Part Number
DAC1008D750HN
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
Table 132. FLAG_CNT_MSB_LN3 register (address 17h) bit description
Default settings are shown highlighted.
Table 133. BER_LEVEL_LSB register (address 18h) bit description
Default settings are shown highlighted.
Table 134. BER_LEVEL_MSB register (address 19h) bit description
Default settings are shown highlighted.
Table 135. INTR_ENA register (address 1Ah) bit description
DAC1008D750
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7
6
5
4
3
2
1
0
Symbol
FLAG_CNT_LN3[15:8]
Symbol
BER_LEVEL[7:0]
Symbol
BER_LEVEL[15:8]
Symbol
INTR_ENA_NIT
INTR_ENA_DISP
INTR_ENA_KOUT
INTR_ENA_KOUT_UNEXP
INTR_ENA_K28_7
INTR_ENA_K28_5
INTR_ENA_K28_3
INTR_ENA_MISC
All information provided in this document is subject to legal disclaimers.
Access
R
Access
R/W
Access
R/W
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 2 — 5 January 2011
Value
Value
00h
Value
00h
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-
2×, 4× or 8× interpolating DAC with JESD204A
Description
Description
LSBs level used for simple (DC) BER-measurement
Description
MSBs level used for simple (DC)
BER-measurement
Description
not-in-table interrupt
disparity-error interrupt
K-character interrupt
unexpected K-character interrupt
K28_7 interrupt
K28_5 interrupt
K28_3 interrupt
miscellaneous interrupt
MSBs of flag_counter lane 3
no action
nit-error in ln<x> affects i_ln<x>
no action
disparity-error in ln<x> affects i_ln<x>
no action
detection K-control character in ln<x> affects
i_ln<x>
no action
detection unexpected K-character in ln<x> affects
i_ln<x>
no action
detection K28_7 in ln<x> affects i_ln<x>
no action
detection K28_5 in ln<x> affects i_ln<x>
no action
detection K28_3 in ln<x> affects i_ln<x>
no action
detection depends on intr_misc_ena
(see
Table
124)
DAC1008D750
© NXP B.V. 2011. All rights reserved.
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