PCA9665D NXP [NXP Semiconductors], PCA9665D Datasheet - Page 78
PCA9665D
Manufacturer Part Number
PCA9665D
Description
Fm+ parallel bus to I2C-bus controller
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9665D.pdf
(90 pages)
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PCA9665_3
Product data sheet
Fig 42. Definition of timing on the I
Fig 43. I
Rise and fall times refer to V
protocol
2
C-bus timing diagram
SDA
SCL
SDA
SCL
t
f
t
SU;STA
S
t
BUF
condition
START
(S)
t
HD;STA
t
HD;STA
t
LOW
t
LOW
t
r
IL
MSB
bit 7
and V
t
r
t
HIGH
2
C-bus
t
IH
HD;DAT
.
t
SU;DAT
t
SU;DAT
t
f
t
HIGH
1
/f
bit 6
Rev. 03 — 12 August 2008
SCL
t
f
t
SU;STA
t
HD;DAT
Sr
bit n
t
t
VD;DAT
HD;STA
bit 0
Fm+ parallel bus to I
t
VD;ACK
t
SU;STO
acknowledge
t
SP
(A)
t
r
P
t
BUF
condition
STOP
t
S
(P)
SU;STO
PCA9665
© NXP B.V. 2008. All rights reserved.
2
002aab271
C-bus controller
002aac696
78 of 90
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