PCA9665D NXP [NXP Semiconductors], PCA9665D Datasheet - Page 26
PCA9665D
Manufacturer Part Number
PCA9665D
Description
Fm+ parallel bus to I2C-bus controller
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9665D.pdf
(90 pages)
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PCA9665_3
Product data sheet
Fig 9.
(1) See
(2) Defined state when a single byte is received and an ACK is sent (AA = 1).
(3) Defined state when a single byte is received and a NACK is sent (AA = 0).
Format and states in the Slave Receiver Byte mode (MODE = 0)
Table
reception of
own slave address
and one or more
data bytes;
all are Acknowledged.
last data byte received is
Not Acknowledged
arbitration lost as MST and
addressed as slave
reception of the
General Call address
and one or more
data bytes
last data byte received is
Not Acknowledged
arbitration lost as MST and
addressed as slave by
General Call
31.
DATA
from master to slave
from slave to master
A
n
any number of data bytes and
their associated Acknowledge bits
S
S
This number (contained in I2CSTA) corresponds
to a defined state of the I
CALL = 00h
GENERAL
SLA
Rev. 03 — 12 August 2008
W
W
2
C-bus.
D0h
D8h
60h
68h
A
A
A
A
(1)
P or S
P or S
F8h on STOP
F8h on STOP
DATA
DATA
80h
E0h
(2)
(2)
A
A
Fm+ parallel bus to I
DATA
DATA
80h
88h
E0h
E8h
(2)
(3)
(2)
(3)
A
A
A
A
002aab026
on STOP
on STOP
P or S
P or S
P or S
P or S
A0h
A0h
F8h
F8h
PCA9665
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
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