PCA9665D NXP [NXP Semiconductors], PCA9665D Datasheet - Page 37

• Manufacturer Part Number: PCA9665D
• Description: Fm+ parallel bus to I2C-bus controller
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCA9665_3
Product data sheet
Fig 12. Format and states in the Master Receiver Buffered mode (MODE = 1)
successful
reception
from a Slave
Transmitter
next transfer
started with a
repeated START
condition
Not Acknowledge
received after
the slave address
arbitration lost in
slave address
or Acknowledge bit
arbitration lost and
addressed as slave
DATA
(1) See
(2) No serial interrupt.
(3) Defined state when LB = 0 and the number of bytes received is equal to the value in I2CCOUNT register.
(4) Defined state when LB = 1 and the number of bytes received is equal to the value in I2CCOUNT register.
(5) Master Transmitter Byte mode is entered with MODE = 0. Master Transmitter Buffered mode is entered when MODE = 1.
from master to slave
from slave to master
Table
08h
A
n
S
28.
any number of data bytes and
their associated Acknowledge bits
This number (contained in I2CSTA) corresponds
to a defined state of the I
SLA
R
MR
A or A
B0h
D8h
48h
38h
68h
(2)
A
A
A
2
C-bus.
F8h
other MST
continues
other MST
continues
P
(1)
to corresponding states in Slave Transmitter mode
to corresponding states in Slave Receiver mode
to corresponding states in Slave Receiver mode (General Call)
DATA
Rev. 03 — 12 August 2008
50h
(3)
A
DATA
Fm+ parallel bus to I
A
DATA
58h
38h
(4)
A
A
to Master Transmitter mode
F8h
10h
other MST
continues
PCA9665
P
S
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
SLA
entry = MT
002aab660
37 of 90
W
R
(5)