PCA9665D NXP [NXP Semiconductors], PCA9665D Datasheet - Page 32
PCA9665D
Manufacturer Part Number
PCA9665D
Description
Fm+ parallel bus to I2C-bus controller
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9665D.pdf
(90 pages)
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PCA9665_3
Product data sheet
The appropriate action to be taken for each of these status codes is detailed in
ENSIO is not affected by the serial transfer and is not referred to in
After a repeated START condition (state 10h), the PCA9665 may switch to the Master
Receiver mode by loading I2CDAT with SLA+R).
Remark: A master should not transmit its own slave address.
•
•
•
•
•
30h if the slave address with direction bit has been successfully sent and no
acknowledgement (NACK) has been received while transmitting the data bytes
(number of total bytes sent is lower than or equal to value in I2CCOUNT).
38h if the PCA9665 lost the arbitration when sending the slave address with the
direction bit or when sending data bytes.
B0h if the PCA9665 lost the arbitration and is addressed as a slave transmitter (slave
mode enabled with AA = 1).
68h if the PCA9665 lost the arbitration and is addressed as a slave receiver (slave
mode enabled with AA = 1).
D8h if the PCA9665 lost the arbitration and is addressed as a slave receiver during a
General Call sequence (slave mode enabled with AA = 1 and General Call address
enabled with GC = 1 in I2CADR register).
Rev. 03 — 12 August 2008
Fm+ parallel bus to I
Table
PCA9665
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
35.
Table
32 of 90
35.
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