PCF8523 NXP [NXP Semiconductors], PCF8523 Datasheet - Page 44

• Manufacturer Part Number: PCF8523
• Description: Real-Time Clock (RTC) and calendar
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF8523
Product data sheet
Fig 29. System configuration
SCL
SDA
8.11.4 Acknowledge
TRANSMITTER
RECEIVER
MASTER
The PCF8523 can act as a slave transmitter and a slave receiver.
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
Acknowledgement on the I
Fig 30. Acknowledgement on the I
•
•
•
•
A slave receiver, which is addressed, must generate an acknowledge cycle after the
reception of each byte.
Also a master receiver must generate an acknowledge cycle after the reception of
each byte that has been clocked out of the slave transmitter.
The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the related
acknowledge clock pulse (set-up and hold times must be taken into consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge cycle on the last byte that has been clocked out of the slave. In this
event, the transmitter must leave the data line HIGH to enable the master to generate
a STOP condition.
by transmitter
data output
by receiver
data output
SCL from
master
RECEIVER
SLAVE
All information provided in this document is subject to legal disclaimers.
condition
START
S
Rev. 3 — 30 March 2011
2
C-bus is shown in
TRANSMITTER
RECEIVER
SLAVE
1
2
C-bus
Figure
2
TRANSMITTER
MASTER
Real-Time Clock (RTC) and calendar
30.
not acknowledge
acknowledge
8
TRANSMITTER
RECEIVER
MASTER
acknowledgement
clock pulse for
PCF8523
© NXP B.V. 2011. All rights reserved.
mba605
9
mbc602
44 of 66