PCF8523 NXP [NXP Semiconductors], PCF8523 Datasheet - Page 31

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PCF8523

Manufacturer Part Number
PCF8523
Description
Real-Time Clock (RTC) and calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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PCF8523
Product data sheet
8.9.1.2 Register Tmr_A_freq_ctrl
A programmable square wave is available at pin INT1/CLKOUT and pin CLKOUT, which
are both open-drain outputs. Pin INT1/CLKOUT has both functions of INT1 and CLKOUT
combined.
The duty cycle of the selected clock is not controlled but due to the nature of the clock
generation, all clock frequencies except 32.768 kHz have a duty cycle of 50 : 50.
The STOP bit function can also affect the CLKOUT signal, depending on the selected
frequency. When STOP is active, the INT1/CLKOUT and CLKOUT pins will be
high-impedance for all frequencies except of 32.768 kHz, 16.384 kHz and 8.192 kHz. For
more details, see
Table 33.
[1]
[2]
[3]
Table 34.
[1]
COF[2:0]
000
110
111
Bit
7 to 3
2 to 0
001
010
011
100
101
[2]
Duty cycle definition: % HIGH-level time : % LOW-level time.
Default value.
Clock frequencies may be affected by offset correction.
Default value.
Symbol
-
TAQ[2:0]
CLKOUT frequency selection
Tmr_A_freq_ctrl - timer A frequency control register (address 10h) bit
description
CLKOUT frequency (Hz)
32768
16384
8192
4096
1024
32
1
CLKOUT disabled (high-Z)
All information provided in this document is subject to legal disclaimers.
Section
Rev. 3 — 30 March 2011
8.10.
Value
-
000
001
010
011
111
110
100
[1]
Typical duty cycle
60 : 40 to 40 : 60
50 : 50
50 : 50
50 : 50
50 : 50
50 : 50
50 : 50
Description
unused
source clock for timer A (see
[3]
[3]
4.096 kHz
64 Hz
1 Hz
1
1
60
3600
Real-Time Clock (RTC) and calendar
Hz
Hz
[1]
Effect of STOP bit
no effect
no effect
no effect
CLKOUT = high-Z
CLKOUT = high-Z
CLKOUT = high-Z
CLKOUT = high-Z
PCF8523
© NXP B.V. 2011. All rights reserved.
Table
38)
31 of 66

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