CY7C43643 CYPRESS [Cypress Semiconductor], CY7C43643 Datasheet - Page 25

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CY7C43643

Manufacturer Part Number
CY7C43643
Description
1K/4K/16K x36 Unidirectional Synchronous FIFO with Bus Matching
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Document #: 38-06021 Rev. *B
Switching Waveforms
Note:
43. If Port B is configured for word size, data can be written to the Mail1 register using A
44. If W/RA switches from read to write before the assertion of CSA, t
45. Simultaneous writing to and reading from mailbox register is not allowed.
CSA
ENA
MBF1
MBB
Timing for Mail1 Register and MBF1 Flag (CY Standard and FWFT Modes)
CLKA
W/RA
MBA
A
CLKB
CSB
W/RB
ENB
B
0 35
0–35
data (B
this second case, B
[44]
[27]
18–35
will be indeterminate). If Port B is configured for byte size, data can be written to the Mail1 Register using A
0–8
will have valid data (B
(continued)
t
EN
t
ENS
t
t
t
ENS
DS
ENS
FIFO Output Register
9–35
t
ENS
W1
will be indeterminate).
t
ENH
t
MDV
t
t
t
ENH
t
ENH
DH
ENH
t
PMF
ENS
= t
t
PMR
DIS
+t
ENS
.
0–17
(A
W1 (Remains valid in Mail1 Register after read)
18–35
are “don’t care” inputs). In this first case B
t
[43,45]
ENS
t
ENH
t
PMF
0–8
(A
9–35
are “don’t care” inputs). In
CY7C43643
CY7C43663
CY7C43683
t
DIS
0–17
Page 25 of 29
will have valid

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