CY7C1471V33_12 CYPRESS [Cypress Semiconductor], CY7C1471V33_12 Datasheet - Page 14

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CY7C1471V33_12

Manufacturer Part Number
CY7C1471V33_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Switching Waveforms
Document Number: 38-05288 Rev. *N
Notes
23. For this waveform ZZ is tied LOW.
24. When CE is LOW, CE
25. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrates CEN being used to create a pause. A write is not performed during this cycle.
COMMAND
ADDRESS
ADV/LD
BW
CEN
[A:D]
CLK
WE
DQ
CE
WRITE
1
D(A1)
A1
is LOW, CE
1
D(A1)
2
Q(A2)
(continued)
READ
is HIGH, and CE
A2
2
Figure 4. NOP, STALL and DESELECT Cycles
STALL
3
3
is LOW. When CE is HIGH, CE
Q(A2)
Q(A3)
READ
A3
4
DON’T CARE
WRITE
D(A4)
A4
Q(A3)
5
1
is HIGH, CE
STALL
UNDEFINED
6
2
is LOW or CE
D(A4)
[23, 24, 25]
NOP
7
3
is HIGH.
READ
Q(A5)
A5
8
t DOH
DESELECT
Q(A5)
CY7C1471V33
9
t CHZ
CONTINUE
DESELECT
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