CY7C1470V25_11 CYPRESS [Cypress Semiconductor], CY7C1470V25_11 Datasheet - Page 30

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CY7C1470V25_11

Manufacturer Part Number
CY7C1470V25_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL Architecture
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document History Page
Document Number: 38-05290 Rev. *L
Document Title: CY7C1470V25/CY7C1472V25/CY7C1474V25 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with
NoBL™ Architecture
Document Number: 38-05290
*K
*J
*L
*I
2898958
3054137
3207715
472335
10/10/2010
03/28/2011
See ECN
03/25/10
(continued)
VKN
NJY
NJY
NJY
Corrected the typo in the pin configuration for 209-Ball FBGA pinout
(Corrected the ball name for H9 to V
Added the Maximum Rating for Supply Voltage on V
Changed t
Switching Characteristics table.
Updated the Ordering Information table.
Removed inactive parts from the ordering information table. Updated package
diagrams.
Updated
Updated
Added
Minor edits and updated in new template.
Updated
Updated
Acronyms
Ordering Information
Package
Ordering
Package
TH
, t
TL
from 25 ns to 20 ns and t
and
Diagrams.
Information.
Diagrams.
Units of
Measure.
and added
SS
from V
Ordering Code
TDOV
SSQ
from 5 ns to 10 ns in TAP AC
).
DDQ
Relative to GND.
Definitions.
CY7C1470V25
CY7C1472V25
CY7C1474V25
Page 30 of 31
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