CY7C1470V25_11 CYPRESS [Cypress Semiconductor], CY7C1470V25_11 Datasheet - Page 2

• Manufacturer Part Number: CY7C1470V25_11
• Description: 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document Number: 38-05290 Rev. *L
Logic Block Diagram - CY7C1472V25 (4 M × 18)
Logic Block Diagram - CY7C1474V25 (1 M × 72)
CEN
CLK
CEN
CLK
A0, A1, A
ADV/LD
MODE
A0, A1, A
ADV/LD
BW
BW
ZZ
C
WE
CE1
CE2
CE3
MODE
OE
BW
BW
BW
BW
BW
BW
BW
BW
ZZ
a
b
C
WE
CE1
CE2
CE3
OE
a
b
c
d
e
f
g
h
WRITE ADDRESS
REGISTER 1
WRITE ADDRESS
REGISTER 1
REGISTER 0
ADDRESS
REGISTER 0
ADDRESS
Control
READ LOGIC
Control
Sleep
READ LOGIC
Sleep
AND DATA COHERENCY
AND DATA COHERENCY
WRITE REGISTRY
CONTROL LOGIC
WRITE REGISTRY
CONTROL LOGIC
WRITE ADDRESS
ADV/LD
WRITE ADDRESS
REGISTER 2
ADV/LD
REGISTER 2
C
C
A1
A0
A1
A0
D1
D0
D1
D0
BURST
LOGIC
BURST
LOGIC
Q1
Q0
Q1
Q0
A0'
A1'
A1'
A0'
DRIVERS
DRIVERS
WRITE
WRITE
MEMORY
MEMORY
REGISTER 1
REGISTER 1
ARRAY
ARRAY
INPUT
INPUT
E
E
N
A
M
S
E
S
E
P
S
M
S
E
N
S
E
A
P
S
O
U
U
G
T
P
T
R
E
S
T
E
R
S
E
I
O
U
T
P
U
T
R
E
G
S
T
E
R
S
E
I
REGISTER 0
REGISTER 0
INPUT
INPUT
D
A
A
N
G
T
S
T
E
E
R
I
D
A
T
A
S
T
E
E
R
N
G
I
E
E
O
U
U
U
T
P
T
B
F
F
E
R
S
E
O
U
T
P
U
T
B
U
F
F
E
R
S
E
DQs
DQP
DQP
DQP
DQP
DQP
DQP
DQP
DQP
CY7C1470V25
CY7C1472V25
CY7C1474V25
DQs
DQP
DQP
a
b
c
d
e
f
g
h
a
b
Page 2 of 31
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