VSC8140QR VITESSE [Vitesse Semiconductor Corporation], VSC8140QR Datasheet - Page 20

• Manufacturer Part Number: VSC8140QR
• Description: 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator
• Manufacturer: VITESSE [Vitesse Semiconductor Corporation]

Transceiver with Integrated Clock Generator
2.48832Gb/s 16:1 SONET/SDH
Page 20
Table 4: Package Pin Identification - 128 PQFP
Pin #
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
REF_FREQSEL
TXPARITYIN
TXCLK16O+
LPTIMCLK+
LPTIMCLK-
TXCLK16O-
FIFORESET
TXCLK16I+
TXCLK16I-
LOOPTIM0
LOOPTIM1
PARMODE
VCC_ANA
VEE_ANA
FACLOOP
REFCLK+
REFCLK-
FILTAON
FILTAIN
FILTAO
TXIN15
TXIN14
TXIN13
TXIN12
TXIN11
TXIN10
FILTAI
TXIN9
Name
VCC
VCC
VCC
VEE
VEE
VEE
VEE
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
VITESSE
I/O
—
—
—
—
—
—
—
—
—
—
—
—
—
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
SEMICONDUCTOR CORPORATION
VITESSE SEMICONDUCTOR CORPORATION
+3.3V typ.
GND typ.
GND typ.
GND typ.
GND typ.
GND typ.
LVPECL
3.3V typ.
LVPECL
LVPECL
LVPECL
3.3V typ.
3.3V typ.
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
Level
TTL
TTL
TTL
TTL
TTL
TTL
—
—
—
—
Negative power supply
Facility loopback, active high
Enable internal looptiming operation, active high
Parity mode select
Reset to align FIFO write and read pointers
Enable external loop timing operation, active high
Reference clock input select
External loop timing clock, true
External loop timing clock, complement
Positive power supplys for analog parts of CMU
Negative power supplys for analog parts of CMU
Reference clock input, true
Reference clock input, complement
Negative power supply
Loop filter pin - connect via capacitor to FILTAI (pin 53)
Loop filter pin - connect via capacitor to FILTAIN (pin 54)
Loop filter pin - connect via capacitor to FILTAO (pin 51)
Loop filter pin - connect via capacitor to FILTAON (pin 52)
Positive power supply
Low-speed clock output, true. A divide-by-16 version of the PLL
clock.
Low-speed clock output, complement. A divide-by-16 version of the
PLL clock.
Negative power supply
Low-speed clock input for latching low-speed data, complement
Low-speed clock input for latching low-speed data, true
Positive power supply
Transmitter parity bit input
Low-speed single-ended data (MSB)
Low-speed single-ended data
Negative power supply
Positive power supply
Low-speed single-ended data
Low-speed single-ended data
Low-speed single-ended data
Low-speed single-ended data
Low-speed single-ended data
Description
(2)
VSC8140
Data Sheet
G52251-0, Rev. 4.0
9/6/00