CY7C1412AV18-250BZXI CYPRESS [Cypress Semiconductor], CY7C1412AV18-250BZXI Datasheet - Page 22

• Manufacturer Part Number: CY7C1412AV18-250BZXI
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05615 Rev. *D
Switching Waveforms
Read/Write/Deselect Sequence
Notes:
28. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, i.e., A0 + 1.
29. Output are disabled (High-Z) one clock cycle after a NOP.
30. In this example, if address A0 = A1, then data Q00 = D10 and Q01 = D11. Write data is forwarded immediately as read results. This note applies to the whole
CQ
Q
C
diagram.
RPS
WPS
C
CQ
A
D
K
K
D10
A0
1
READ
t KHCH
t KH
t KH
t SA t HA
D11
A1
WRITE
2
t KHCH
t KL
t KL
[28, 29, 30]
t
t SA t HA
SC t
D30
A2
3
READ
t HC
t KHKH
t CQOH
t CLZ
t CO
t SD
t CYC
A3
D31
4
WRITE
t HD
t CQOH
t CCQO
D50
A4
5
t CYC
READ
Q00
t KHKH
t DOH
t CCQO
D51
A5
WRITE
6
Q01
t CQDOH
t SD t HD
D60
7
NOP
Q20
A6
D61
WRITE
8
Q21
t CQD
DON’T CARE
CY7C1410AV18
CY7C1425AV18
CY7C1412AV18
CY7C1414AV18
NOP
9
Q40
t
CHZ
UNDEFINED
10
Page 22 of 25
Q41