CY7C1412AV18-250BZXI CYPRESS [Cypress Semiconductor], CY7C1412AV18-250BZXI Datasheet - Page 15

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CY7C1412AV18-250BZXI

Manufacturer Part Number
CY7C1412AV18-250BZXI
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document #: 38-05615 Rev. *D
TAP AC Switching Characteristics
TAP Timing and Test Conditions
Notes:
11. t
12. Test conditions are specified using the load in TAP AC test conditions. t
t
t
t
t
Setup Times
t
t
t
Hold Times
t
t
t
Output Times
t
t
TCYC
TF
TH
TL
TMSS
TDIS
CS
TMSH
TDIH
CH
TDOV
TDOX
Parameter
CS
and t
TDO
CH
refer to the setup and hold time requirements of latching data from the boundary scan register.
TCK Clock Cycle Time
TCK Clock Frequency
TCK Clock HIGH
TCK Clock LOW
TMS Setup to TCK Clock Rise
TDI Setup to TCK Clock Rise
Capture Setup to TCK Rise
TMS Hold after TCK Clock Rise
TDI Hold after Clock Rise
Capture Hold after Clock Rise
TCK Clock LOW to TDO Valid
TCK Clock LOW to TDO Invalid
Z
0
= 50Ω
Test Mode Select
TMS
Test Clock
TCK
Test Data-In
TDI
Test Data-Out
TDO
(a)
GND
0.9V
C
50Ω
L
= 20 pF
[12]
Over the Operating Range
Description
t
TMSS
t
TDIS
R
/t
F
= 1 ns.
t
TH
0V
[11, 12]
t
t
TDOV
TL
t
t
TMSH
TDIH
1.8V
ALL INPUT PULSES
0.9V
t
TCYC
t
TDOX
Min
50
20
20
5
5
5
5
5
5
0
CY7C1410AV18
CY7C1425AV18
CY7C1412AV18
CY7C1414AV18
Max
20
10
Page 15 of 25
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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