ICS87951-147I IDT [Integrated Device Technology], ICS87951-147I Datasheet - Page 8

• Manufacturer Part Number: ICS87951-147I
• Description: LOW SKEW, 1-TO-9 DIFFERENTIAL-TOLVCMOS ZERO DELAY BUFFER
• Manufacturer: IDT [Integrated Device Technology]

IDT
3.3V O
D
C
O
QA, QB,
nCLK1
QAx, QBx,
QCx, QDx
-1.65V±5%
IFFERENTIAL
YCLE
CLK1
UTPUT
ICS87951I-147
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-LVCMOS ZERO DELAY BUFFER
GND
GND
1.65V±5%
V
V
LVCMOS
QCx,
™
QDx
V
DDA
DDO
DD
/ ICS
,
-
TO
UTPUT
D
™
-C
V
UTY
DIFFERENTIAL-TO-LVCMOS ZERO DELAY BUFFER
PP
➤
YCLE
I
V
L
NPUT
C
DDO
2
OAD
YCLE
J
ITTER
t
L
t
AC T
jit(cc) =
cycle n
/P
EVEL
t
ULSE
PW
odc =
EST
Cross Points
1000 Cycles
W
t
cycle n –
C
t
t
IDTH
PERIOD
PERIOD
IRCUIT
➤
t
P
PW
➤
V
/P
DDO
ARAMETER
V
2
DDO
ERIOD
2
x 100%
t
cycle n+1
t
cycle n+1
Qx
SCOPE
V
➤
CMR
M
V
DDO
EASUREMENT
2
8
P
O
O
2.5V O
EXT_FB
-1.25V±5%
HASE
UTPUT
UTPUT
1.25V±5%
Qx
nCLK1
GND
Qy
CLK0,
LVCMOS
V
V
CLK1
Clock
Outputs
DDA
DDO
(where t (Ø) is any random sample, and t (Ø)
of the sampled cycles measured on controlled edges)
,
J
UTPUT
S
R
ITTER AND
KEW
ISE
20%
➤
I
t (Ø)
V
/F
NFORMATION
DDO
2
L
V
ALL
t jit(Ø) = t (Ø) — t (Ø)
➤
OAD
DDO
2
t sk(o)
S
T
t (Ø)
TATIC
AC T
IME
80%
t
R
mean
P
EST
HASE
= Static Phase Offset
C
ICS87951I-147 REV A JUNE 21, 2006
IRCUIT
O
mean
FFSET
= Phase Jitter
80%
Qx
t
mean
F
SCOPE
is the average
20%
V
DD
2