S29PL-N_07 SPANSION [SPANSION], S29PL-N_07 Datasheet - Page 20

• Manufacturer Part Number: S29PL-N_07
• Description: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

7.
7.1
20
Device Operations
Device Operation Table
This section describes the read, program, erase, simultaneous read/write operations, and reset features of
the Flash devices.
Operations are initiated by writing specific commands or a sequence with specific address and data patterns
into the command registers (see
itself does not occupy any addressable memory location. Instead, the command register is composed of
latches that store the commands, along with the address and data information needed to execute the
command. The contents of the register serve as input to the internal state machine and the state machine
outputs dictate the function of the device. Writing incorrect address and data values or writing them in an
improper sequence can place the device in an unknown state, in which case the system must write the reset
command to return the device to the reading array data mode.
The device must be setup appropriately for each operation.
control pin for any particular operation.
Legend
L = Logic Low = V
V
SA = Sector Address
D
Note
WP#/ACC must be high when writing to upper two and lower two sectors (PL256N: 0, 1,132, and 133; PL127/129N: 0, 1, 68, and 69)
Read
Write
Standby
Output Disable
Reset
HH
IN
= Data In
= 8.5 – 9.5 V
Operation
IL
H = Logic High = V
X = Don’t Care
A
D
IN
OUT
CE#
H
X
L
L
L
= Address In
= Data Out
S29PL-N MirrorBit
OE#
D a t a
H
X
H
X
L
Table 12.1 on page 66
IH
WE#
Table 7.1 Device Operation
H
X
H
X
L
S h e e t
™
RESET#
Flash Family
H
H
H
H
L
( P r e l i m i n a r y )
and
Table 7.1
Table 12.2 on page
(See Note)
WP#/ACC
X
X
X
X
X
describes the required state of each
(A
Addresses
max
S29PL-N_00_A5 June 6, 2007
A
A
A
A
A
68). The command register
IN
IN
IN
IN
IN
– A0)
DQ15 – DQ0
High-Z
High-Z
High-Z
D
D
OUT
IN