MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 447
MC68HC912D60
Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC912D60.pdf
(460 pages)
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Technical Data — MC68HC912D60A
A — See “accumulators (A and B or D).”
accumulators (A and B or D) — Two 8-bit (A and B) or one 16-bit (D) general-purpose registers
acquisition mode — A mode of PLL operation with large loop bandwidth. Also see ’tracking
address bus — The set of wires that the CPU or DMA uses to read and write memory locations.
addressing mode — The way that the CPU determines the operand address for an instruction.
ALU — See “arithmetic logic unit (ALU).”
analogue-to-digital converter (ATD) — The ATD module is an 8-channel, multiplexed-input
arithmetic logic unit (ALU) — The portion of the CPU that contains the logic circuitry to perform
asynchronous — Refers to logic circuits and operations that are not synchronized by a common
ATD — See “analogue-to-digital converter”.
B — See “accumulators (A and B or D).”
baud rate — The total number of bits transmitted per unit of time.
BCD — See “binary-coded decimal (BCD).”
binary — Relating to the base 2 number system.
binary number system — The base 2 number system, having two digits, 0 and 1. Binary
MC68HC912D60A — Rev 3.0
MOTOROLA
in the CPU. The CPU uses the accumulators to hold operands and results of arithmetic
and logic operations.
mode’.
The M68HC12 CPU has 15 addressing modes.
successive-approximation analog-to-digital converter.
arithmetic, logic, and manipulation operations on operands.
reference signal.
arithmetic is convenient in digital circuit design because digital circuits have two
permissible voltage levels, low and high. The binary digits 0 and 1 can be interpreted to
correspond to the two digital voltage levels.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Glossary
Glossary
Technical Data
447
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