MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 388

• Manufacturer Part Number: MC68HC912D60
• Description: Microcontrollers
• Manufacturer: Motorola

Development Support
19.4.5.1 STATUS
STATUS— BDM Status Register
Technical Data
388
RESET:
RESET:
1. ENBDM is set to 1 by the firmware in Special Single Chip mode.
(NOTE 1)
ENBDM
BIT 7
0
0
BDMACT
6
1
0
The only registers of interest to users are the STATUS register and the
CCRSAV register. The other BDM registers are only used by the BDM
firmware to execute commands. The registers are accessed by means
of the hardware READ_BD and WRITE_BD commands, but should not
be written during BDM operation (except the CCRSAV register which
could be written to modify the CCR value).
The STATUS register is read and written by the BDM hardware as a
result of serial data shifted in on the BKGD pin.
Read: all modes.
Write: Bits 3 through 5, and bit 7 are writable in all modes. Bit 6,
BDMACT, can only be written if bit 7 H/F in the INSTRUCTION register
is a zero. Bit 2, CLKSW, can only be written if bit 7 H/F in the
INSTRUCTION register is a one. A user would never write ones to bits
3 through 5 because these bits are only used by BDM firmware.
ENBDM — Enable BDM (permit active background debug mode)
•
•
Freescale Semiconductor, Inc.
(1)
ENTAG
For More Information On This Product,
0 = BDM cannot be made active (hardware commands still
1 = BDM can be made active to allow firmware commands.
The ADDRESS register is temporary storage for BDM commands.
The CCRSAV register preserves the content of the CPU12 CCR
while BDM is active.
5
0
0
allowed).
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Development Support
SDV
4
0
0
TRACE
3
0
0
CLKSW
2
0
0
1
0
0
-
MC68HC912D60A — Rev 3.0
BIT 0
0
0
-
MOTOROLA
Special Sin-
& Periph
gle Chip
All other
modes
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