MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 372

• Manufacturer Part Number: MC68HC912D60
• Description: Microcontrollers
• Manufacturer: Motorola

ATD0STAT1/ATD1STAT1 — ATD Status Register
ATD0STAT0/ATD1STAT0 — ATD Status Register
Analog-to-Digital Converter
18.9.5 ATDSTAT A/D Status Register
Technical Data
372
RESET:
RESET:
CCF7
Bit 7
Bit 7
SCF
0
0
CCF6
6
0
6
0
0
The ATD Status registers contain the conversion complete flags and the
conversion sequence counter. The status registers are read-only.
SCF — Sequence Complete Flag
CC[2:0] — Conversion Counter
CCF[7:0] — Conversion Complete Flags
This flag is set upon completion of a conversion sequence. If
conversion sequences are continuously performed (SCAN=1), the
flag is set after each one is completed. How this flag is cleared
depends on the setting of the fast flag clear bit. When AFFC=0, SCF
is cleared when a new conversion sequence is initiated (write to
register ATDCTL4/5). When AFFC=1, SCF is cleared after reading
the first (any) result register.
This 3-bit value represents the contents of the result register counter;
the result register counter points to the result register that will receive
the result of the current conversion. If not in FIFO mode, the register
counter is initialized to zero when a new conversion sequence is
begun.
If in FIFO mode, the register counter is not initialized. The result
register count wraps around when its maximum value is reached.
A conversion complete flag is set at the end of each conversion in a
conversion sequence. The flags are associated with the conversion
position in a sequence and the result register number. Therefore,
CCF0 is set when the first conversion in a sequence is complete and
Freescale Semiconductor, Inc.
For More Information On This Product,
CCF5
5
0
0
5
0
Analog-to-Digital Converter
Go to: www.freescale.com
CCF4
4
0
0
4
0
CCF3
3
0
0
3
0
CCF2
CC2
2
0
2
0
CCF1
CC1
MC68HC912D60A — Rev 3.0
1
0
1
0
CCF0
Bit 0
CC0
Bit 0
0
0
$0067/$01E7
$0066/$01E6
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