MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 119

no-image

MC68HC912D60

Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
Technical Data — MC68HC912D60A
9.1 Contents
9.2 Introduction
9.2.1 Exception Priority
MC68HC912D60A — Rev 3.0
MOTOROLA
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
CPU12 exceptions include resets and interrupts. Each exception has an
associated 16-bit vector, which points to the memory location where the
routine that handles the exception is located. Vectors are stored in the
upper 128 bytes of the standard 64K byte address map.
The six highest vector addresses are used for resets and non-maskable
interrupt sources. The remainder of the vectors are used for maskable
interrupts, and all must be initialized to point to the address of the
appropriate service routine.
A hardware priority hierarchy determines which reset or interrupt is
serviced first when simultaneous requests are made. Six sources are not
Freescale Semiconductor, Inc.
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Maskable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
Latching of Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
Interrupt Control and Priority Registers . . . . . . . . . . . . . . . . .123
Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Register Stacking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Customer Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Go to: www.freescale.com
Resets and Interrupts
Section 9. Resets and Interrupts
Technical Data
119

Related parts for MC68HC912D60