IDT71321 Integrated Device Technology, IDT71321 Datasheet - Page 9

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IDT71321

Manufacturer Part Number
IDT71321
Description
HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
Manufacturer
Integrated Device Technology
Datasheet

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IDT71321SA/LA AND IDT71421SA/LA
HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
TIMING WAVEFORM OF WRITE WITH
NOTES:
1. All timing is the same for left and right ports. Port 'A' may be either left or right port. Port 'B' is the opposite from port 'A'.
2. If t
TIMING WAVEFORM OF BUSY ARBITRATION CONTROLLED BY
TIMING WAVEFORM OF BUSY ARBITRATION CONTROLLED BY ADDRESS MATCH TIMING
NOTES:
1. t
2.
3. All timing is the same for the left and right ports. Port 'A' may be either the left or right port. Port 'B' is opposite from port 'A'.
ADDR
ADDR
ADDR
BUSY
BUSY
BUSY
asserted (71321 only).
WH
and
CE
CE
APS
must be met for both
'B'
'B'
'A'
'A'
'A'
'B'
'A'
'B'
is not satisified, the
is asserted on port 'B' blocking R/
t
APS
(2)
BUSY
BUSY
BUSY
R/
t
Input (IDT71421, slave) or Output (IDT71321, master).
R/
APS
will be asserted on one side or the other, but there is no guarantee on which side
W
W
(2)
R
R
L
ADDRESSES MATCH
W
t
BAA
'B'
, until
t
RC OR
t
BAC
BUSY
t
t
WC
WB
'B'
BUSY
BUSY
BUSY
BUSY
BUSY
goes High.
ADDRESSES MATCH
(3)
(2)
t
6.03
WP
t
BDC
ADDRESSES DO NOT MATCH
t
WH
t
BDA
(1)
CE CE CE CE CE
COMMERCIAL TEMPERATURE RANGE
TIMING
2691 drw 11
BUSY
(1)
will be
2691 drw 13
2691 drw 12
9
(1)

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