FW82801E Intel, FW82801E Datasheet - Page 42

• Manufacturer Part Number: FW82801E
• Description: Communications I/O Controller Hub
• Manufacturer: Intel

Intel
3.2.9
3.2.10
42
Table 15. USB Interface Signals
Table 16. Power Signals
®
82801E C-ICH
USB Interface
Power Signals
RSM_PWROK
VRMPWRGD
RSMRST#
PWROK
USBP0N
USBP1N
OC[1:0]#
USBP0P
USBP1P
Name
Name
Type
I
I
I
I
Type
I/O
I
Power OK: When asserted, PWROK is an indication to the 82801E C-ICH that
core power and PCICLK have been stable for at least 1 ms. PWROK can be driven
asynchronously. When PWROK is negated, the 82801E C-ICH asserts PCIRST#.
Resume Well Power OK: When asserted, this signal is an indication to the
82801E C-ICH that the resume well power has been stable for at least 10 ms.
NOTE: The 82801E C-ICH does not use the resume well power OK signal.
Resume Well Reset: RSMRST# is used for resetting the resume power plane
logic.
NOTE: The 82801E C-ICH does not use the resume well reset signal.
VRM Power Good: VRMPWRGD should be connected to be the processor’s VRM
Power Good.
Universal Serial Bus Port 1:0 Differential: These differential pairs are used to
transmit Data/Address/Command signals for ports 0 and 1.
Overcurrent Indicators: These signals set corresponding bits in the USB
controllers to indicate that an overcurrent condition has occurred.
Description
Description
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