S29CD-J_12 SPANSION [SPANSION], S29CD-J_12 Datasheet - Page 79

• Manufacturer Part Number: S29CD-J_12
• Manufacturer: SPANSION [SPANSION]

October 11, 2012 S29CD-J_CL-J_00_B7
Advanced Sector Protection/
Unprotection
DC Characteristics
Test Specifications
Asynchronous Operations
Synchronous Operations
Erase/Program Operations
Latchup Characteristics
Common Flash Memory Interface (CFI)
Revision B3 (March 30, 2009)
Global
Distinctive Characteristics
Performance Characteristics
Ordering Information
Input/Output Descriptions and Logic
Symbols
Block Diagram
Table: S29CD016J/CL016J (Top Boot)
Sector and Memory Address Map
Table: 32-Bit Linear and Burst Data
Order
Programming
Table: DC Characteristic, CMOS
Compatible
Table: Burst Mode for 32 Mb and 16 Mb
Figure: Synchronous Command Write/
Read Timing
Table: Erase/Program Operations
Figure: Program Operation Timings
Figure: Chip/Sector Erase Operation
Timings
Table: Alternate CE# Controlled Erase/
Program Operations
Product Overview
Table: Device Bus Operation
Accelerated Program and Erase
Operations
Unlock Bypass
Simultaneous Read/Write
Section
Modified Advanced Sector Protection/Unprotection figure and notes. In some subsections, changed
“sector” to “sector group”.
Changed I
Changed C
Asynchronous Command Write Timing figure: Added note.
Asynchronous Read Operations table: Changed t
Burst Mode Read for 32 Mb and 16 Mb table: Changed t
specifications.
Burst Mode Read figure: Modified period lengths for several specifications.
Added t
Deleted section.
CFI System Interface String table: Modified description of address 1Bh.
CFI Primary Vendor-Specific Extended Query table: Modified data at address 45h.
Removed “Preliminary”
Changed all instances of V
Removed “or without” (wrap around) from Programmable Burst Interface bullet
Added notice to refer to programming best practices application note for 32 Mb devices.
Added S29CL032J to valid OPN diagram.
Corrected valid combinations table.
Subscript CC for V
Changed type for V
Changed type for V
Removed DQmax-DQ0 label from inputs to Burst Address Counter and Address Latch.
Removed Amax-A0 label from I/O Buffers.
Changed Note 2 to refer to Bank 0 and 1 instead of Bank 1 and 2.
Removed “x16”
Removed “A0:A-1” from Output Data Sequence column for Four Linear Data Transfers.
Removed “A1:A-1” from Output Data Sequence column for Eight Linear Data Transfers.
Added notice to refer to programming best practices application note for 32 Mb devices.
Changed Max I
Corrected values for t
Added t
Added timing definition for t
Appended “from WE# Rising Edge” to t
Changed t
Updated timing diagram to reflect new t
Updated timing diagram to reflect new t
Removed t
Removed “or without”.
Changed “X” to “H” under CLK column for CE# row.
Removed all mention of accelerated erase.
Removed mention of unlock bypass sector erase.
Added in warning to indicate restrictions on Simultaneous Read/Write conditions.
D a t a
WEH
WADVS
S29CD-J and S29CL-J Flash Family
CCB
AH
WADVS
L
.
and t
Min to 11.75 ns.
test conditions and I
parameter to table.
CCB
S h e e t
OEP
parameter.
CC
IO
SS
for S29CL-J to 90 mA.
, IO for V
BDH
to “Supply”
specifications to table.
to “Supply”
with separate values for 16Mb and 32Mb.
CCQ
WADVS
IO
to V
, SS for V
.
CC1
IO
maximum specification.
AH
AH
AH
SS
description.
value.
value.
Description
in table.
RC
, t
ACC
INDS
, t
CE
, t
for 75 MHz device.
CLKL
, t
AAVH
, and t
WADVH1
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