VN16118L1 VAISH [Vaishali Semiconductor], VN16118L1 Datasheet - Page 5

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VN16118L1

Manufacturer Part Number
VN16118L1
Description
Gigabit Ethernet Transceiver
Manufacturer
VAISH [Vaishali Semiconductor]
Datasheet
VN16118
Table1. (Continued)
1999-12-15
GND_RXT
VCC_RXT
RX<9>
RX<8>
RX<7>
RX<6>
RX<5>
RX<4>
RX<3>
RX<2>
RX<1>
RX<0>
COM_DET
VCC_RXF
GND_RXF
DIN+
DIN-
VCC_RXESD
GND_RXESD
VCC_RXA
GND_RXA
VCC_TX_ECL
DOUT-
DOUT+
VCC_TX_HS
GND_TX_HS
Vaishali Semiconductor
Name
33
46,
37,
42
34
35
36
38
39
40
41
43
44
45
47
50
51
52
54
53,55
56
57,
59
58
60
61
62
63
64
Pin#
l
747 Camden Avenue
Power
TTL
Output
TTL
Output
Power
Input
Power
Power
Power
Output
Power
Type
Power and ground pairs for ESD structure.
Received Parallel Data Output. RX<0> is the least significant
bit and is received first. When DIN lose input data, all RX
pins will be held HIGH.
Comma detect. This pin is active HIGH. When asserted, it
indicates the detection of comma character (0011111XXX). It
is active only when EN_CEDT is enabled.
Power and ground pair for the front-end of the receiver section.
High-speed serial data input. Serial data input is received when
EWRAP is disabled.
Power and ground pair for ESD structure.
Power and ground pair for analog circuits of the receiver
section.
Power supply to line driver circuits. Ground supply is from pin
64.
High-speed serial data output. These pins are active when
EWRAP is disabled and are held static at logic 1 when EWRAP
is enable.
Power and ground pair for high-speed transmit logic in the
parallel-to-serial section.
l
Campbell
Page 5
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CA 95008
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Description
Ph. 408.379.2900
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Fax 408.379.2937
Preliminary
MDSN-0001-00

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