PLL202-151 PhaseLink (PLL), PLL202-151 Datasheet - Page 17

• Manufacturer Part Number: PLL202-151
• Description: Ali, Via, Sis, Intel 440BX Chipset FTGS , I2C Programmable: Skew / SST / Frequency / Drive
• Manufacturer: PhaseLink (PLL)

18. VCO Divider Control Register (Continued):
19. BYTE 23: VCO N Counter Register:
20. BYTE 24: VCO N Counter Register
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Byte #
Byte
22
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Name
Name
N<15>
N<14>
N<13>
N<12>
N<11>
N<10>
N<9>
N<8>
N<7>
N<6>
N<5>
N<4>
N<3>
N<2>
N<1>
N<0>
Programmable Clock Generator for VIA, ALI and SIS DDR SYSTEM
AGP[1:2]
Divider
Divider
PCI
Default
Default
Name
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
-
-
N<15:0>= VCO*1024/14.31818
N <15:0>= VCO*1024/14.31818
Bit <2>
Bit <1>
Bit <0>
Bit <2>
Bit <1>
Bit <0>
Default
1
1
1
1
1
1
1
1
Reserved
Reserved
These three bits will program output frequency for AGP1
and AGP2 clocks (see Table 3).
These three bits will program output frequency for all
PCI clocks (see Table 3).
Description
Description
PRELIMINARY
Description
PLL202-151
Rev 11/05/01 Page 17