SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 588
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
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128 KByte Flash Module (S12XFTMR128K1V1)
19.4.2
This section provides details of all available Flash commands launched by a command write sequence. The
ACCERR bit in the FSTAT register will be set during the command write sequence if any of the following
illegal steps are performed, causing the command not to be processed by the Memory Controller:
If a Flash block is read during execution of an algorithm (CCIF = 0) on that same block, the read operation
will return invalid data. If the SFDIF or DFDIF flags were not previously set when the invalid read
operation occurred, both the SFDIF and DFDIF flags will be set and the FECCR registers will be loaded
with the global address used in the invalid read operation with the data and parity fields set to all 0.
If the ACCERR or FPVIOL bits are set in the FSTAT register, the user must clear these bits before starting
any command write sequence (see
19.4.2.1
The Erase Verify All Blocks command will verify that all P-Flash and D-Flash blocks have been erased.
588
FCMD
0x0D
•
•
•
0x0B
0x0E
0x10
0x11
0x12
Starting any command write sequence that programs or erases Flash memory before initializing the
FCLKDIV register
Writing an invalid command as part of the command write sequence
For additional possible errors, refer to the error handling table provided for each command
Flash Command Description
Program D-Flash
Set User Margin
Set Field Margin
D-Flash Section
Unsecure Flash
Erase Verify All Blocks Command
Erase D-Flash
Erase Verify
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
Command
Sector
Level
Level
Table 19-31. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
000
Supports a method of releasing MCU security by erasing all D-Flash (and P-Flash) blocks
and verifying that all D-Flash (and P-Flash) blocks are erased.
Specifies a user margin read level for the D-Flash block.
Specifies a field margin read level for the D-Flash block (special modes only).
Verify that a given number of words starting at the address provided are erased.
Program up to four words in the D-Flash block.
Erase all bytes in a sector of the D-Flash block.
S12XS Family Reference Manual, Rev. 1.09
Section
Table 19-30. D-Flash Commands
19.3.2.7).
0x01
CAUTION
FCCOB Parameters
Function on D-Flash Memory
Not required
Freescale Semiconductor
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