SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 378
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
- Current page: 378 of 736
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Pulse-Width Modulator (S12PWM8B8CV1)
Write: Anytime (any value written causes PWM counter to be reset to $00).
13.3.2.13 PWM Channel Period Registers (PWMPERx)
There is a dedicated period register for each channel. The value in this register determines the period of
the associated PWM channel.
The period registers for each channel are double buffered so that if they change while the channel is
enabled, the change will NOT take effect until one of the following occurs:
In this way, the output of the PWM will always be either the old waveform or the new waveform, not some
variation in between. If the channel is not enabled, then writes to the period register will go directly to the
latches as well as the buffer.
See
To calculate the output period, take the selected clock source period for the channel of interest (A, B, SA,
or SB) and multiply it by the value in the period register for that channel:
For boundary case programming values, please refer to
Read: Anytime
Write: Anytime
378
Module Base + 0x0014 = PWMPER0, 0x0015 = PWMPER1, 0x0016 = PWMPER2, 0x0017 = PWMPER3
Module Base + 0x0018 = PWMPER4, 0x0019 = PWMPER5, 0x001A = PWMPER6, 0x001B = PWMPER7
Reset
•
•
•
•
•
Section 13.4.2.3, “PWM Period and Duty”
W
R
The effective period ends
The counter is written (counter resets to $00)
The channel is disabled
Left aligned output (CAEx = 0)
PWMx Period = Channel Clock Period * PWMPERx Center Aligned Output (CAEx = 1)
PWMx Period = Channel Clock Period * (2 * PWMPERx)
Bit 7
1
7
Reads of this register return the most recent value written. Reads do not
necessarily return the value of the currently active period due to the double
buffering scheme.
Figure 13-15. PWM Channel Period Registers (PWMPERx)
1
6
6
S12XS Family Reference Manual, Rev. 1.09
1
5
5
for more information.
NOTE
1
4
4
Section 13.4.2.8, “PWM Boundary
1
3
3
1
2
2
Freescale Semiconductor
1
1
1
Cases”.
Bit 0
1
0
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