SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 235

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SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
8.2
This section lists and describes the signals that connect off chip.
8.2.1
These pins provides operating voltage (V
the supply voltage to the IPLL to be independently bypassed. Even if IPLL usage is not required V
and V
8.2.2
RESET is an active low bidirectional reset pin. As an input it initializes the MCU asynchronously to a
known start-up state. As an open-drain output it indicates that an system reset (internal to MCU) has been
triggered.
Freescale Semiconductor
SSPLL
XCLKS
EXTAL
XTAL
Signal Description
must be connected to properly.
V
RESET
V
V
DDPLL
DDPLL
SSPLL
RESET
S12X_MMC
Oscillator
Monitor
Clock
Regulator
Voltage
, V
SSPLL
ICRG
OSCCLK
Figure 8-1. Block diagram of S12XECRG
IPLL
Illegal Address Reset
Power on Reset
Low Voltage Reset
S12XS Family Reference Manual Rev. 1.09
PLLCLK
CM Fail
DDPLL
) and ground (V
Clock and Reset Control
COP
Clock Quality
Generator
Registers
Checker
Reset
SSPLL
S12XE Clocks and Reset Generator (S12XECRGV1)
RTI
) for the IPLL circuitry. This allows
System Reset
Bus Clock
Core Clock
Oscillator Clock
Real Time Interrupt
PLL Lock Interrupt
Self Clock Mode
Interrupt
DDPLL
235

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