SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 193

no-image

SC9S12XS256J1MAA

Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
6.1.4
The S12XDBG module can be used in all MCU functional modes.
During BDM hardware accesses and whilst the BDM module is active, CPU12X monitoring is disabled.
Thus breakpoints, comparators, and CPU12X bus tracing are disabled . When the CPU12X enters active
BDM Mode through a BACKGROUND command, with the S12XDBG module armed, the S12XDBG
remains armed.
The S12XDBG module tracing is disabled if the MCU is secure. However, breakpoints can still be
generated if the MCU is secure.
Freescale Semiconductor
Enable
BDM
x
0
0
1
1
— Loop1: same as Normal but inhibits consecutive duplicate source address entries
— Detail: address and data for all cycles except free cycles and opcode fetches are stored
— Pure PC: All program counter addresses are stored.
4-stage state sequencer for trace buffer control
— Tracing session trigger linked to Final State of state sequencer
— Begin, End, and Mid alignment of tracing to trigger
Modes of Operation
Active
BDM
x
0
1
0
1
Secure
MCU
1
0
0
0
0
Table 6-3. Mode Dependent Restriction Summary
S12XS Family Reference Manual, Rev. 1.09
Matches Enabled
Comparator
Yes
Yes
Yes
No
Active BDM not possible when not enabled
Breakpoints
Only SWI
Possible
Yes
Yes
No
Possible
Tagging
S12X Debug (S12XDBGV3) Module
Yes
Yes
Yes
No
Possible
Tracing
Yes
Yes
No
No
193

Related parts for SC9S12XS256J1MAA