hy5ps1g821m Hynix Semiconductor, hy5ps1g821m Datasheet - Page 32

• Manufacturer Part Number: hy5ps1g821m
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 0.2 / Oct. 2005
Reads interrupted by a read
Burst read can only be interrupted by another read with 4 bit burst boundary. Any other case of read inter-
rupt is not allowed.
Read Burst Interrupt Timing Example: (CL=3, AL=0, RL=3, BL=8)
Note
1. Read burst interrupt function is only allowed on burst of 8. Burst interrupt of 4 is prohibited.
2. Read burst of 8 can only be interrupted by another Read command. Read burst interruption by Write
3. Read burst interrupt must occur exactly two clocks after previous Read command. Any other Read
4. Read burst interruption is allowed to any bank inside DRAM.
5. Read burst with Auto Precharge enabled is not allowed to interrupt.
6. Read burst interruption is allowed by another Read with Auto Precharge command.
7. All command timings are referenced to burst length set in the mode register. They are not referenced
CK/CK
DQS/DQS
CMD
DQs
command or Precharge command is prohibited.
burst interrupt timings are prohibited.
to actual burst. For example, Minimum Read to Precharge timing is AL + BL/2 where BL is the burst
length set in the mode register and not the actual burst (which is shorter because of interrupt).
Read A
NOP
Read B
NOP
A0
A1
NOP
A2
A3
NOP
B0
B1
NOP
B2
B3
NOP
1HY5PS12421(L)M
HY5PS12821(L)M
B4
B5
NOP
B6
B7
NOP
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