hy5ps1g821m Hynix Semiconductor, hy5ps1g821m Datasheet - Page 13

• Manufacturer Part Number: hy5ps1g821m
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 0.2 / Oct. 2005
2.3.2 Programming the Mode and Extended Mode Registers
For application flexibility, burst length, burst type, CAS latency, DLL reset function, write recovery time(tWR)
are user defined variables and must be programmed with a Mode Register Set (MRS) command. Addition-
ally, DLL disable function, driver impedance, additive CAS latency, ODT(On Die Termination), single-ended
strobe, and OCD(off chip driver impedance adjustment) are also user defined variables and must be pro-
grammed with an Extended Mode Register Set (EMRS) command. Contents of the Mode Register(MR) or
Extended Mode Registers(EMR(#)) can be altered by re-executing the MRS and EMRS Commands. If the
user chooses to modify only a subset of the MRS or EMRS variables, all variables must be redefined when
the MRS or EMRS commands are issued.
MRS, EMRS and Reset DLL do not affect array contents, which means reinitialization including those can be
executed any time after power-up without affecting array contents.
Initialization Sequence after Power Up
Command
ODT
1. If OCD calibration is not used, EMRS OCD Default command (A9=A8= A7=1) followed by EMRS OCD
2. The DDR2 SDRAM is now ready for normal operation.
CKE
CK
/CK
Calibration Mode Exit command (A9=A8=A7=0) must be issued with other operating parameters of
EMRS.
*1) To guarantee ODT off, VREF must be valid and a low level must be applied to the ODT pin.
*2) Sequence 5 and 6 may be performed between 8 and 9.
tCH
tIS
NOP
tCL
400ns
PRE
ALL
tRP
DLL
ENABLE
EMRS
tMRD
DLL
RESET
MRS
tMRD
PRE
ALL
tRP
REF
tRFC
min. 200 Cycle
REF
tRFC
MRS
tMRD
1HY5PS12421(L)M
HY5PS12821(L)M
EMRS
OCD
Default
Follow OCD
Flowchart
EMRS
OCD
CAL. MODE
EXIT
tOIT
ANY
CMD
13