r6781-12 Conexant Systems, Inc., r6781-12 Datasheet - Page 22

• Manufacturer Part Number: r6781-12
• Description: Embedded Modem Family
• Manufacturer: Conexant Systems, Inc.

2.1 Hardware Interface
2-8
Line Control Register
DLAB
7
(Addr = 3)
SB
6
The Line Control Register (LCR) specifies the format of the asynchronous data
communications exchange.
DLAB
SB
SP
EPS
PEN
STB
WLS0 and WLS1 Word Length Select. These two bits specify the number of
SP
5
EPS
4
Divisor Latch Access Bit. This bit must be set to a logic 1 to
access the Divisor latches of the baud generator during a read
or write operation. It must be reset to a logic 0 to access the
Receiver Buffer, the Transmitter Holding Register, or the
Interrupt Enable Register.
Set Break. When this bit is set to a logic 1, the transmit data is
forced to the space (logic 0) state. The break is disabled by
setting this bit to a logic 0. The Set Break bit acts only on the
transmit data and has no effect on the serial in logic.
Stick Parity. When stick parity is selected (LCR5 = 1), parity
is enabled (LCR3 = 1), and even parity is selected (LCR4 = 1),
the parity bit is transmitted and checked by the receiver as a
logic 0. When stick parity is selected (LCR5 = 1), parity is
enabled (LCR3 = 1), and odd parity is selected (LCR4 = 0),
the parity bit is transmitted and checked by the receiver as a
logic 1.
Even Parity Select. When parity is enabled (LCR3 = 1), and
Stick Parity (LCR5) is a logic 0, the number of logic 1s
transmitted or checked in the data word bits and parity bit is
either even (LCR4 = 1) or odd (LCR4 = 0).
Parity Enable. When bit 3 is a logic 1, a parity bit is
generated in the serial out (transmit) data stream and checked
in the serial in (receive) data stream. The parity bit is located
between the last data bit and the first stop bit.
Number of Stop Bits. This bit specifies the number of stop
bits in each serial out character. If bit 2 is a logic 0, one stop
bit is generated regardless of word length. If bit 2 is a logic 1
when either a 5-, 6-, 7-, or 8-bit word length is selected, two
stop bits are generated. The serial in logic checks the first stop
bit only regardless of the number of stop bits selected.
bits in each serial in or serial out character. The encoding of
bits 0 and 1 is:
Bit 1
Conexant
0
0
1
1
PEN
3
Bit 0
0
1
0
1
STB
2
Word Length
EmbeddedModem Family
5 Bits
6 Bits
7 Bits
8 Bits
WLS1
1
D224ATLVDSC
WLS0
0