IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 32

• Manufacturer Part Number: IDT79RC32332
• Description: IDT Interprise Integrated Communications Processor
• Manufacturer: IDT [Integrated Device Technology]

IDT 79RC32355
USB
USBCLKP
USBDN, USBDP
USBDN and USBDP
Rise and Fall Time
Matching
Data valid period
Skew between USBDN
and USBDP
Source data jitter
Receive data jitter
Source EOP length
Receive EOP length
EOP jitter
Full-speed Data Rate
Frame Interval
Consecutive Frame
Interval Jitter
1
USB clock (USBCLKP) frequency must be less than CLKP frequency.
Signal
1
Thigh1,Tlow1
Trise1,Tfall1
Symbol
Tperiod1
Tfdrate
Tjitter1
Trise2
Tstate
Tseop
Treop
Tfall2
Reference
Edge
none
Table 11 USB AC Timing Characteristics
0.9995 1.0005 0.9995 1.0005 0.9995 1.0005
19.79 21.87 19.79 21.87 19.79 21.87
11.97 12.03 11.97 12.03 11.97 12.03
Min
160
133MHz
8.3
90
60
82
—
—
—
—
—
-2
—
—
4
4
111.11
Max
175
126
0.8
0.4
3.5
—
20
20
—
12
—
42
3
5
32 of 47
Min
150MHz
160
8.3
90
60
82
—
—
—
—
—
—
—
-2
4
4
111.11
Max
175
126
0.8
0.4
3.5
20
20
12
42
—
—
—
3
5
180MHz
Min
160
8.3
90
60
82
—
—
—
—
—
—
—
-2
4
4
111.11
Max
175
126
0.8
0.4
3.5
20
20
12
42
—
—
—
3
5
Unit
MHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
1/4th of the mini-
mum Source data
jitter
Universal Serial Bus
Specification
(USBS) Revision
1.1: Figures 7.6 and
7.7.
USBS Revision 1.1:
Figures 7.6 and 7.7.
USBS Revision 1.1:
Note 10, Section
7.1.2.
USBS Revision 1.1:
Section 7.1.3
USBS Revision 1.1:
Table 7-6
Average bit rate,
USBS Section
7.1.11.
USBS Section
7.1.12.
Without frame
adjustment.
With frame adjust-
ment.
Conditions
May 25, 2004
Figure 17
Reference
Diagram
Timing