IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 3

• Manufacturer Part Number: IDT79RC32332
• Description: IDT Interprise Integrated Communications Processor
• Manufacturer: IDT [Integrated Device Technology]

Device Overview
mance 32-bit microprocessor. The microprocessor core is used exten-
sively at the heart of the device to implement the most needed
functionalities in software with minimal hardware support. The high
performance microprocessor handles diverse general computing tasks
and specific application tasks that would have required dedicated hard-
ware. Specific application tasks implemented in software can include
routing functions, fire wall functions, modem emulation, ATM SAR
emulation, and others.
nications and digital consumer applications. It is a single chip solution
that incorporates most of the generic system functionalities and applica-
tion specific interfaces that enable rapid time to market, very low cost
systems, simplified designs, and reduced board real estate.
CPU Execution Core
microprocessor core. The RC32300 implements the enhanced MIPS-II
ISA and helps meet the real-time goals and maximize throughput of
communications and consumer systems by providing capabilities such
as a prefetch instruction, multiple DSP instructions, and cache locking.
The DSP instructions enable the RC32300 to implement 33.6 and
56kbps modem functionality in software, removing the need for external
dedicated hardware. Cache locking guarantees real-time performance
by holding critical DSP code and parameters in the cache for immediate
availability. The microprocessor also implements an on-chip MMU with a
TLB, making the it fully compliant with the requirements of real time
operating systems.
Memory and I/O Controller
controller providing support for SDRAM, Flash ROM, SRAM, dual-port
memory, and other I/O devices. It can interface directly to 8-bit boot
ROM for a very low cost system implementation. It enables access to
very high bandwidth external memory (380 MB/sec peak) at very low
system costs. It also offers various trade-offs in cost / performance for
the main memory architecture. The timers implemented on the RC32355
satisfy the requirements of most RTOS.
IDT 79RC32355
The RC32355 is a “System on a Chip” which contains a high perfor-
The RC32355 meets the requirements of various embedded commu-
The RC32355 is built around the RC32300 32-bit high performance
The RC32355 incorporates a flexible memory and peripheral device
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DMA Controller
the on-chip interfaces, external peripherals, and memory. The DMA
controller supports scatter / gather DMA with no alignment restrictions,
appropriate for communications and graphics systems.
TDM Bus Interface
to directly access external devices such as telephone CODECs and
quality audio A/Ds and D/As. This feature is critical for applications, such
as cable modems and xDSL modems, that need to carry voice along
with data to support Voice Over IP capability.
Ethernet Interface
100 Mbps line interface with an MII interface. It supports up to 4 MAC
addresses. In a SOHO router, the high performance RC32300 CPU core
routes the data between the Ethernet and the ATM interface. In other
applications, such as high speed modems, the Ethernet interface can be
used to connect to the PC.
USB Device Interface
enable consumer appliances to directly connect to the PC.
ATM SAR
UTOPIA level 1 or a UTOPIA level 2 interface. The ATM SAR is imple-
mented as a hybrid between software and hardware. A hardware block
provides the necessary low level blocks (like CRC generation and
checking and cell buffering) while the software is used for higher level
SARing functions. In xDSL modem applications, the UTOPIA port inter-
faces directly to an xDSL chip set. In SOHO routers or in a line card for a
Layer 3 switch, it provides access to an ATM network.
Enhanced JTAG Interface for ICE
includes an Enhanced JTAG (EJTAG) interface. This interface consists
of two operation modes: Run-Time Mode and Real-Time Mode.
debugging, and the Real-Time Mode provides additional status pins—
PCST[2:0]—which are used in conjunction with the JTAG pins for real-
time trace information at the processor internal clock or any division of
the pipeline clock.
The DMA controller off-loads the CPU core from moving data among
The RC32355 contains an on-chip Ethernet MAC capable of 10 and
The RC32355 includes the industry standard USB device interface to
For low-cost In-Circuit Emulation (ICE), the RC32300 CPU core
The Run-Time Mode provides a standard JTAG interface for on-chip
The RC32355 incorporates an industry standard TDM bus interface
The RC32355 includes a configurable ATM SAR that supports a
May 25, 2004