IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 11

• Manufacturer Part Number: IDT79RC32332
• Description: IDT Interprise Integrated Communications Processor
• Manufacturer: IDT [Integrated Device Technology]

DMAP[2]
DMAP[3]
UART
U0SOUTP
U0SINP
U0RIN
U0DCRN
U0DTRN
U0DSRN
U0RTSN
U0CTSN
U0SOUTP
U1SINP
U1DTRN
U1DSRN
U1RTSN
IDT 79RC32355
Name
Type I/O Type
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Low Drive Active DMA channel code. DMA debug enable is selected during reset using the boot configuration and overrides the
Low Drive Active DMA channel code. DMA debug enable is selected during reset using the boot configuration and overrides the
Low Drive UART channel 0 data terminal ready.
Low Drive UART channel 0 request to send.
Low Drive UART channel 1 serial transmit.
Low Drive UART channel 1 data terminal ready.
Low Drive UART channel 1 request to send.
STI
STI
STI
STI
STI
STI
STI
STI
selection of the Primary and Alternate functions.
Primary function: General Purpose I/O, GPIOP[9].
1st Alternate function: U1SINP.
selection of the Primary and Alternate functions.
Primary function: General Purpose I/O, GPIOP[8].
1st Alternate function: U1SOUTP.
UART channel 0 serial transmit.
Primary function: General Purpose I/O, GPIOP[0]. At reset, this pin defaults to primary function GPIOP[0].
UART channel 0 serial receive.
Primary function: General Purpose I/O, GPIOP[1]. At reset, this pin defaults to primary function GPIOP[1].
UART channel 0 ring indicator.
Primary function: General Purpose I/O, GPIOP[2]. At reset, this pin defaults to primary function GPIOP[2] if JTAG reset
enable is not selected during reset using the boot configuration.
2nd Alternate function: JTAG boundary scan reset, JTAG_TRST_N.
UART channel 0 data carrier detect.
Primary function: General Purpose I/O, GPIOP[3]. At reset, this pin defaults to primary function GPIOP[3].
Primary function: General Purpose I/O, GPIOP[4]. At reset, this pin defaults to primary function GPIOP[4] if CPU/DMA Sta-
tus Mode enable is not selected during reset using the boot configuration.
2nd Alternate function: CPU or DMA transaction indicator, CPUP.
UART channel 0 data set ready.
Primary function: General Purpose I/O, GPIOP[5]. At reset, this pin defaults to primary function GPIOP[5].
Primary function: General Purpose I/O, GPIOP[6]. At reset, this pin defaults to primary function GPIOP[6].
UART channel 0 clear to send.
Primary function: General Purpose I/O, GPIOP[7]. At reset, this pin defaults to primary function GPIOP[7].
Primary function: General Purpose I/O, GPIOP[8]. At reset, this pin defaults to primary function GPIOP[8] if DMA Debug
enable is not selected during reset using the boot configuration.
2nd Alternate function: DMA channel, DMAP[3].
UART channel 1 serial receive.
Primary function: General Purpose I/O, GPIOP[9]. At reset, this pin defaults to primary function GPIOP[9] if DMA Debug
enable is not selected during reset using the boot configuration.
2nd Alternate function: DMA channel, DMAP[2].
Primary function: General Purpose I/O, GPIOP[10]. At reset, this pin defaults to primary function GPIOP[10] if ICE Interface
enable is not selected during reset using the boot configuration.
Alternate function: PC trace status bit 0, EJTAG_PCST[0].
UART channel 1 data set ready.
Primary function: General Purpose I/O, GPIOP[11]. At reset, this pin defaults to primary function GPIOP[11] if ICE Interface
enable is not selected during reset using the boot configuration.
2nd Alternate function: PC trace status bit 1, EJTAG_PCST[1].
Primary function: General Purpose I/O, GPIOP[12]. At reset, this pin defaults to primary function GPIOP[12] if ICE Interface
enable is not selected during reset using the boot configuration.
2nd Alternate function: PC trace status bit 2, EJTAG_PCST[2].
Table 1 Pin Descriptions (Part 7 of 8)
11 of 47
Description
May 25, 2004