SST25VF040B-50-4I-SAE SST [Silicon Storage Technology, Inc], SST25VF040B-50-4I-SAE Datasheet - Page 11

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SST25VF040B-50-4I-SAE

Manufacturer Part Number
SST25VF040B-50-4I-SAE
Description
4 Mbit SPI Serial Flash
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet

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4 Mbit SPI Serial Flash
SST25VF040B
Byte-Program
The Byte-Program instruction programs the bits in the
selected byte to the desired data. The selected byte must
be in the erased state (FFH) when initiating a Program
operation. A Byte-Program instruction applied to a pro-
tected memory area will be ignored.
Prior to any Write operation, the Write-Enable (WREN)
instruction must be executed. CE# must remain active low
for the duration of the Byte-Program instruction. The Byte-
©2009 Silicon Storage Technology, Inc.
FIGURE 7: Byte-Program Sequence
SCK
CE#
SO
SI
MODE 3
MODE 0
MSB
0 1 2 3 4 5 6 7 8
02
HIGH IMPEDANCE
MSB
11
ADD.
Program instruction is initiated by executing an 8-bit com-
mand, 02H, followed by address bits [A
address, the data is input in order from MSB (bit 7) to LSB
(bit 0). CE# must be driven high before the instruction is
executed. The user may poll the Busy bit in the software
status register or wait T
self-timed Byte-Program operation. See Figure 7 for the
Byte-Program sequence.
15 16
ADD.
23 24
ADD.
31 32
MSB
1295 ByteProg.0
D
BP
IN
LSB
for the completion of the internal
39
23
S71295-05-000
-A
0
]. Following the
Data Sheet
10/09

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