ADF4116 Analog Devices, ADF4116 Datasheet - Page 5

• Manufacturer Part Number: ADF4116
• Description: Single, Integer-n 550 MHZ PLL
• Manufacturer: Analog Devices

Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
FL
CP
CPGND
AGND
RF
RF
AV
REF
DGND
CE
CLK
DATA
LE
MUXOUT
DV
V
P
O
IN
IN
DD
DD
IN
B
A
Function
Fast Lock Switch Output. This can be used to switch an external resistor to change the loop filter band-
width. This will speed up locking of the PLL.
Charge Pump Output. When enabled, this provides the ±I
the external VCO.
Charge Pump Ground. This is the ground return path for the charge pump.
Analog Ground. This is the ground return path for the prescaler.
Complementary Input to the RF Prescaler. This point should be decoupled to the ground plane with a
small bypass capacitor, typically 100 pF. See Figure 3.
Input to the RF Prescaler. This small signal input is ac-coupled from the VCO.
Analog Power Supply. This may range from 2.7 V to 5.5 V. Decoupling capacitors to the analog ground
plane should be placed as close as possible to this pin. AV
Reference Input. This is a CMOS input with a nominal threshold of V
resistance of 100 kΩ. See Figure 2. The oscillator input can be driven from a TTL or CMOS crystal
oscillator or it can be ac-coupled.
Digital Ground.
Chip Enable. A logic low on this pin powers down the device and puts the charge pump output into three-
state mode. Taking the pin high will power up the device depending on the status of the power-down bit F2.
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into
the 21-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This
input is a high impedance CMOS input.
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one
of the four latches, the latch being selected using the control bits.
This multiplexer output allows either the Lock Detect, the scaled RF or the scaled Reference Frequency
to be accessed externally.
Digital Power Supply. This may range from 2.7 V to 5.5 V. Decoupling capacitors to the digital ground
plane should be placed as close as possible to this pin. DV
Charge Pump Power Supply. This should be greater than or equal to V
it can be set to 5 V and used to drive a VCO with a tuning range of up to 6 V.
PIN FUNCTION DESCRIPTIONS
CPGND
AGND
RF
RF
REF
PIN CONFIGURATION
AV
FL
IN
IN
CP
DD
IN
O
B
A
1
2
3
4
5
6
7
8
(Not to Scale)
ADF4116
ADF4117
ADF4118
TOP VIEW
TSSOP
16
15
14
13
12
11
10
9
V
DV
MUXOUT
LE
DATA
CLK
CE
DGND
P
DD
CP
ADF4116/ADF4117/ADF4118
DD
DD
to the external loop filter, which in turn drives
must be the same value as DV
must be the same value as AV
DD
DD
. In systems where V
/2 and an equivalent input
DD
DD
.
.
DD
is 3 V,