ADF4116 Analog Devices, ADF4116 Datasheet - Page 20

• Manufacturer Part Number: ADF4116
• Description: Single, Integer-n 550 MHZ PLL
• Manufacturer: Analog Devices

ADF4116/ADF4117/ADF4118
ADuC812 Interface
Figure 10 shows the interface between the ADF4116 family and
the ADuC812 microconverter. Since the ADuC812 is based on
an 8051 core, this interface can be used with any 8051-based
microcontroller. The microconverter is set up for SPI Master
Mode with CPHA = 0. To initiate the operation, the I/O port
driving LE is brought low. Each latch of the ADF4116 family
needs a 24-bit word. This is accomplished by writing three 8-bit
bytes from the microconverter to the device. When the third
byte has been written the LE input should be brought high to
complete the transfer.
On first applying power to the ADF4116 family, it requires three
writes (one each to the R counter latch, the N counter latch,
and the initialization latch) for the output to become active.
I/O port lines on the ADuC812 are also used to control power-
down (CE input) and to detect lock (MUXOUT configured as
lock detect and polled by the port input).
ADuC812
I/O PORTS
SCLOCK
MOSI
SEATING
SCLK
SDATA
LE
CE
MUXOUT
(LOCK DETECT)
PLANE
0.006 (0.15)
0.002 (0.05)
PIN 1
0.0256 (0.65)
ADF4116/
ADF4117/
ADF4118
16
1
BSC
0.201 (5.10)
0.193 (4.90)
Dimensions shown in inches and (mm).
Thin Shrink Small Outline
OUTLINE DIMENSIONS
0.0118 (0.30)
0.0075 (0.19)
0.0433 (1.10)
9
8
MAX
0.177 (4.50)
0.169 (4.30)
(RU-16)
0.0035 (0.090)
0.0079 (0.20)
0.256 (6.50)
0.246 (6.25)
When operating in the mode described, the maximum SCLOCK
rate of the ADuC812 is 4 MHz. This means that the maximum
rate at which the output frequency can be changed will be 166 kHz.
ADSP-2181 Interface
Figure 11 shows the interface between the ADF4116 family and
the ADSP-21xx Digital Signal Processor. The ADF4116 family
needs a 21-bit serial word for each latch write. The easiest way
to accomplish this using the ADSP-21xx family is to use the
Autobuffered Transmit Mode of operation with Alternate Fram-
ing. This provides a means for transmitting an entire block of
serial data before an interrupt is generated.
Set up the word length for 8 bits and use three memory loca-
tions for each 24-bit word. To program each 21-bit latch, store
the three 8-bit bytes, enable the Autobuffered Mode, and write
to the transmit register of the DSP. This last operation initiates
the autobuffer transfer.
8
0
ADSP-21xx
I/O FLAGS
0.028 (0.70)
0.020 (0.50)
SCLK
TFS
DT
SCLK
SDATA
LE
CE
MUXOUT
(LOCK DETECT)
ADF4116/
ADF4117/
ADF4118