MSC8101UG/D FREESCALE [Freescale Semiconductor, Inc], MSC8101UG/D Datasheet - Page 62

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MSC8101UG/D

Manufacturer Part Number
MSC8101UG/D
Description
Network Digital Signal Processor
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Physical and Electrical Specifications
Figure 2-16 shows Host DMA read timing.
Figure 2-17 shows Host DMA write timing.
2-22
Figure 2-16.
Figure 2-17.
MSC8103 Network Digital Signal Processor, Rev. 11
HD[0–15]
(Output)
(Output)
HREQ
HACK
HD[0–15]
(Output)
(Output)
HREQ
HACK
Host DMA Read Timing Diagram, HPCR[OAD] = 0
Host DMA Write Timing Diagram, HPCR[OAD] = 0
49
64
64
50
TX[0–3]
47
Write
RX[0–3]
Read
44a
45
Valid
Data
Data
Valid
46
44b
63
48
63
52
51
Freescale Semiconductor

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