MSC8101UG/D FREESCALE [Freescale Semiconductor, Inc], MSC8101UG/D Datasheet - Page 2

• Manufacturer Part Number: MSC8101UG/D
• Description: Network Digital Signal Processor
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Table of Contents
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Ordering and Contact Information ............................................................................................................................... Back Cover
Data Sheet Conventions
ii
pin and pin-
out
OVERBAR
“asserted”
“deasserted”
Examples:
Note: Values for V
MSC8103 Features .................................................................................................................................................................................... iii
Target Applications .....................................................................................................................................................................................iv
Product Documentation ..............................................................................................................................................................................iv
Signals/Connections
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
Physical and Electrical Specifications
2.1
2.2
2.3
2.4
2.5
2.6
Packaging
3.1
3.2
Design Considerations
4.1
4.2
4.3
4.4
Means that a high true (active high) signal is high or that a low true (active low) signal is low
Means that a high true (active high) signal is low or that a low true (active low) signal is high
Although the device package does not have pins, the term pins and pin-out are used for
convenience and indicate specific signal locations within the ball-grid array.
Used to indicate a signal that is active when pulled low (For example, the
when low.)
Signal/Symbol
IL
, V
Power Signals......................................................................................................................................................................... 1-4
Clock Signals ......................................................................................................................................................................... 1-4
Reset, Configuration, and EOnCE Event Signals .................................................................................................................. 1-5
System Bus, HDI16, and Interrupt Signals............................................................................................................................ 1-6
Memory Controller Signals ................................................................................................................................................. 1-13
CPM Ports............................................................................................................................................................................ 1-15
JTAG Test Access Port Signals............................................................................................................................................ 1-36
Reserved Signals.................................................................................................................................................................. 1-36
Absolute Maximum Ratings .................................................................................................................................................. 2-1
Recommended Operating Conditions .................................................................................................................................... 2-2
Thermal Characteristics ......................................................................................................................................................... 2-2
DC Electrical Characteristics................................................................................................................................................. 2-3
Clock Configuration............................................................................................................................................................... 2-4
AC Timings............................................................................................................................................................................ 2-7
FC-PBGA Package Description............................................................................................................................................. 3-1
Lidded FC-PBGA Package Mechanical Drawing ............................................................................................................... 3-31
Thermal Design Considerations............................................................................................................................................. 4-1
Electrical Design Considerations........................................................................................................................................... 4-1
Power Considerations ............................................................................................................................................................ 4-2
Layout Practices..................................................................................................................................................................... 4-3
PIN
PIN
PIN
PIN
OL
, V
MSC8103 Network Digital Signal Processor, Rev. 11
IH
, and V
OH
are defined by individual product specifications.
Logic State
False
False
True
True
Signal State
Deasserted
Deasserted
Asserted
Asserted
Freescale Semiconductor
RESET
V
V
V
V
Voltage
pin is active
IH
IH
IL
IL
/V
/V
/V
/V
OL
OH
OH
OL