RM7000-300S PMC [PMC-Sierra, Inc], RM7000-300S Datasheet - Page 17

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RM7000-300S

Manufacturer Part Number
RM7000-300S
Description
Manufacturer
PMC [PMC-Sierra, Inc]
Datasheet
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002175, Issue 1
4.10 System Control Coprocessor (CP0)
Table 5 Floating Point Latencies and Repeat Rates
To support superscalar operations, the FGR has four read ports and two write ports, and is fully
bypassed to minimize operation latency in the pipeline. Three of the read ports and one write port
are used to support the combined multiply-add instruction while the fourth read and second write
port allows a concurrent floating-point load or store and conditional moves.
The system control coprocessor (CP0) in the MIPS architecture is responsible for the virtual
memory sub-system, the exception control system, and the diagnostics capability of the processor.
In the MIPS architecture, the system control coprocessor (and thus the kernel software) is
implementation dependent. For memory management, the RM7000 CP0 is logically identical to
that of the RM5200 Family and R5000. For interrupt exceptions and diagnostics, the RM7000 is a
superset of the RM5200 Family and R5000 implementing additional features described later in the
sections on Interrupts, the Test/Breakpoint facility, and the Performance Counter facility.
The memory management unit controls the virtual memory system page mapping. It consists of an
instruction address translation buffer (ITLB), a data address translation buffer (DTLB), a Joint
TLB (JTLB), and coprocessor registers used by the virtual memory mapping sub-system.
Operation
fadd
fsub
fmult
fmadd
fmsub
fdiv
fsqrt
frecip
frsqrt
fcvt.s.d
fcvt.s.w
fcvt.s.l
fcvt.d.s
fcvt.d.w
fcvt.d.l
fcvt.w.s
fcvt.w.d
fcvt.l.s
fcvt.l.d
fcmp
fmov, fmovc
fabs, fneg
Latency
Single/double
4
4
4/5
4/5
4/5
21/36
21/36
21/36
38/68
4
6
6
4
4
4
4
4
4
4
1
1
1
RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet
Repeat Rate
Single/double
1
1
1/2
1/2
1/2
19/34
19/34
19/34
36/66
1
3
3
1
1
1
1
1
1
1
1
1
1
Released
17

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