RM7000-300S PMC [PMC-Sierra, Inc], RM7000-300S Datasheet - Page 11

• Manufacturer Part Number: RM7000-300S
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002175, Issue 1
3
Description
PMC-Sierra’s RM7000 is a highly integrated symmetric superscalar microprocessor capable of
issuing two instructions each processor cycle. It has two high-performance 64-bit integer units as
well as a high-throughput, fully pipelined 64-bit floating point unit. To keep its multiple execution
units running efficiently, the RM7000 integrates not only 16 KB 4-way set associative instruction
and data caches but backs them up with an integrated 256 KB 4-way set associative secondary as
well. For maximum efficiency, the data and secondary caches are write-back and non-blocking. An
optional external tertiary cache provides high-performance capability even in applications having
very large data sets.
A RM5200 Family compatible, operating system friendlymemory management unit with a 64/48-
entry fully associative TLB and a high-performance 64-bit system interface supporting multiple
outstanding reads with out-of-order return and hardware prioritized and vectored interrupts round
out the main features of the processor.
The RM7000 is ideally suited for high-end embedded control applications such as
internetworking, high-performance image manipulation, high-speed printing, and 3-D
visualization. The RM7000 is also applicable to the low end workstation market where its
balanced integer and floating-point performance and direct support for a large tertiary cache (up to
8 MB) provide outstanding price/performance.
RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet
Released
11