m28f008 Intel Corporation, m28f008 Datasheet - Page 7

• Manufacturer Part Number: m28f008
• Description: 8 Mbit 1 Mbit X 8 Flash Memory
• Manufacturer: Intel Corporation

NOTES
1 Refer to DC Characteristics When V
2 X can be V
voltages
3 RY BY is V
WSM is not busy in Erase Suspend mode or deep powerdown mode
4 Command writes involving block erase or byte write are only successfully executed when V
5 Refer to Table 3 for valid D
must be logically active to obtain data at the outputs
Chip Enable (CE) is the device selection control and
when active enables the selected memory device
Output Enable (OE) is the data input output (DQ
DQ
from the selected memory onto the I O bus RP and
WE must also be at V
cycle waveforms
Output Disable
With OE at a logic-high level (V
puts are disabled Output pins (DQ
placed in a high-impedance state
Standby
CE at a logic-high level (V
standby mode Standby operation disables much of
the M28F008’s circuitry and substantially reduces
device power consumption The outputs (DQ
are placed in a high-impedence state independent of
the status of OE If the M28F008 is deselected dur-
ing block erase or byte write the device will continue
functioning and consuming normal active power until
the operation completes
Deep Power-Down
The M28F008 offers a deep powerdown feature en-
tered when RP is at V
100 mA maximum in deep powerdown mode with
current draw through V
Read
Output Disable
Standby
PowerDown
Intelligent Identifier (Mfr)
Intelligent Identifier (Device)
Write
7
) direction control and when active drives data
IL
OL
Mode
or V
when the Write State Machine is executing internal block erase or byte write algorithms It is V
IH
for control pins and addresses and V
IH
IL
PP
Figure 8 illustrates read bus
IH
IN
Current draw thru V
20 mA maximum During
) places the M28F008 in
during a write operation
IH
Notes
1 2 3
3 4 5
) the device out-
PP
3
3
e
0
V
– DQ
PPL
Table 2 Bus Operations
V
V
V
V
V
V
RP
V
0
7
IH
IH
IH
IH
IH
IH
memory contents can be read but not written or erased
– DQ
IL
) are
CC
0
7
is
–
)
V
CE
V
V
V
V
V
X
IH
IL
IL
IL
IL
IL
PPL
or V
read modes RP at a logic-low level (V
the memory places output drivers in a high-impe-
dence state and turns off all internal circuits The
M28F008 requires time t
tics-Read-Only Operations) after return from power-
down until initial memory access outputs are valid
After this wakeup interval normal operation is re-
stored The Command User Interface is reset to
Read Array mode and the upper 5 bits of the Status
Register are cleared to value 10000 upon return to
normal operation
During block erase or byte write modes RP at a log-
ic-low level (V
contents of the block being altered are no longer
valid as the data will be partially written or erased
Time t
quired before another command can be written
Intelligent Identifier Operation
The intelligent identifier operation outputs the manu-
facturer code 89H and the device code A2H for
the M28F008 The system CPU can then automati-
cally match the device with its proper block erase
and byte write algorithms
The manufacturer and device codes are read via the
Command User Interface Following a write of 90H
to the Command User Interface a read from ad-
dress location 00000H outputs the manufacturer
code (89H) A read from address location 00001H
outputs the device code (A2H) It is not necessary to
have high voltage applied to V
gent identifier from the Command User Interface
V
V
OE
V
V
V
X
X
IH
IH
PPH
IL
IL
IL
PHWL
for V
WE
V
V
V
V
V
X
X
IH
IH
IH
IH
IL
PP
after RP goes to logic-high (V
IL
See DC Characteristics for V
) will abort either operation Memory
V
V
A
X
X
X
X
X
IH
IL
0
V
PHQV
X
X
X
X
X
X
X
PP
PP
e
(see AC Characteris-
V
PP
DQ
High Z
High Z
High Z
PPH
D
A2H
89H
D
OUT
to read the intelli-
IN
0–7
IL
PPL
OH
) deselects
M28F008
RY BY
IH
and V
when the
V
V
V
) is re-
X
X
X
X
OH
OH
OH
PPH
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