kh561 Fairchild Semiconductor, kh561 Datasheet - Page 11

• Manufacturer Part Number: kh561
• Description: Wideband, Low Distortion Driver Amplifier
• Manufacturer: Fairchild Semiconductor

KH561
REV. 1A February 2001
e
For the circuit of Figure 1, the equivalent input noise
voltage may be calculated using the data sheet spot
noises and R
All terms cast as (nV/√Hz)
Gain Accuracy (DC):
A classical op amp’s gain accuracy is principally set by
the accuracy of the external resistors. The KH561
also depends on the internal characteristics of the
forward current gain and inverting input impedance. The
performance equations for A
Thevinin model of Figure 5 are the most direct way of
assessing the absolute gain accuracy. Note that internal
temperature drifts will decrease the absolute gain
slightly as the part warms up. Also note that the para-
meter tolerances affect both the signal gain and output
impedance. The gain tolerance to the load must include
both of these effects as well as any variation in the load.
The impact of each parameter shown in the performance
equations on the gain to the load (A
Increasing current gain G
Increasing inverting input R
Increasing R
Increasing R
Applications Suggestions
Driving a Capacitive Load:
The KH561 is particularly suitable for driving a capacitive
load. Unlike a classical op amp (with an inductive output
impedance), the KH561’s output impedance, while
starting out real at the programmed value, goes some-
what capacitive at higher frequencies. This yields a very
stable performance driving a capacitive load. The overall
response is limited by the (1/RC) bandwidth set by the
KH561’s output impedance and the load capacitance. It
is therefore advantageous to set a low R
constraint that extremely low R
distortion performance. R
data sheet plots.
capacitive load that the KH561 achieves better than
60dBc THD (10-bits) driving 2V
through 30MHz.
Improving the Output Impedance Match
vs. Frequency - Using R
Using the loop gain to provide a non-zero output
impedance provides a very good impedance match at
low frequencies. As shown on the Output Return Loss
plot, however, this match degrades at higher frequencies.
Adding a small external resistor in series with the output,
R
programmed R
match over frequency. Figure 9 shows this approach.
n
x
, as part of the output impedance (and adjusting the
=
=
2.62nV/ Hz
( )
2.1
2
+
f
g
s
( )
= 25Ω, R
.07
o
accordingly) provides a much better
2
+
Note from distortion plots into a
(
.632
L
x
= ∞. Recall that 4kT = 16E-21J.
:
2
o
)
i
2
= 25Ω was selected for the
+
v
(
f
1.22
Increases A
Decreases A
lncreases A
Decreases A
and R
values will degrade the
pp
L
)
) is shown below.
2
into a 50pF load
+
o
(
.759
along with the
L
L
L
L
)
o
2
with the
+
(
.089
)
2
Increasing R
at the load. A minimum R
with the desired output match.
thermal analysis discussion, R
limiting the internal power under an output shorted
condition.
Interpreting the Slew Rate:
The slew rate shown in the data sheet applies to the volt-
age swing at the load for the circuit of Figure 1. Twice this
value would be required of a low output impedance
amplifier using an external matching resistor to achieve
the same slew rate at the load.
Layout Suggestions:
The fastest fine scale pulse response settling requires
careful attention to the power supply decoupling.
Generally, the larger electrolytic capacitor ground
connections should be as near the load ground (or cable
shield connection) as is reasonable, while the higher
frequency ceramic de-coupling caps should be as near
the KH561’s supply pins as possible to a low inductance
ground plane.
Evaluation Boards:
An evaluation board (showing a good high frequency lay-
out) for the KH561 is available. This board may be
ordered as part #730019.
Thermal Analysis and Protection
A thermal analysis of a chip and wire hybrid is
directed
temperature of all the internal transistors. From the total
internal power dissipation, a case temperature may be
developed using the ambient temperature and the case
to ambient thermal impedance.
dominant power dissipating paths are considered to
determine which has the maximum rise above case
temperature.
The thermal model and analysis steps are shown below.
As is typical, the model is cast as an electrical model
where the temperatures are voltages, the power dissipa-
tors are current sources, and the thermal impedances
are resistances. Refer to the summary design equations
and Figure 1 for a description of terms.
V
i
R
Figure 9: Improving Output Impedance
s
R
g
at
x
+
KH561
-
will decrease the achievable voltage swing
determining
Match vs. Frequency
R
f
C
x
x
should be used consistent
the
With:
R
and R
R
x
o
x
R'
= KH561 output impedance
is also very useful in
o
As discussed in the
= R
o
maximum
Then, each of the
+ R
R
x
L
+ R
x
V
= R
R
o
o
o
= R'
L
DATA SHEET
generally
o
junction
- R
x
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