MK30DN512ZVLQ10 Freescale Semiconductor, MK30DN512ZVLQ10 Datasheet - Page 27

• Manufacturer Part Number: MK30DN512ZVLQ10
• Description: Specifications: Program Memory Size: 512KB (512K x 8) ; RAM Size: 128K x 8 ; Number of I /O: 102 ; Package / Case: 144-LQFP ; Speed: 100MHz ; Oscillator Type: Internal ; Packaging: Tray ; Program Memory Type: FLASH ; EEPROM Size: - ; Core Processor:
• Manufacturer: Freescale Semiconductor

1. This parameter is measured with the internal reference (slow clock) being used as a reference to the FLL (FEI clock
2. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=0.
3. The resulting system clock frequencies should not exceed their maximum specified values. The DCO frequency deviation
4. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=1.
5. The resulting clock frequency must not exceed the maximum specified clock frequency of the device.
Freescale Semiconductor, Inc.
f
dco_t_DMX3
t
Symbol
fll_acquire
J
J
t
J
f
pll_lock
mode).
(Δf
D
acc_pll
pll_ref
cyc_pll
D
cyc_fll
f
I
I
vco
lock
pll
pll
2
unl
dco_t
) over voltage and temperature should be considered.
DCO output
frequency
FLL period jitter
FLL target frequency acquisition time
VCO operating frequency
PLL operating current
PLL operating current
PLL reference frequency range
PLL period jitter (RMS)
PLL accumulated jitter over 1µs (RMS)
Lock entry frequency tolerance
Lock exit frequency tolerance
Lock detector detection time
Description
• f
• f
• PLL @ 96 MHz (f
• PLL @ 48 MHz (f
• f
• f
• f
• f
2 MHz, VDIV multiplier = 48)
2 MHz, VDIV multiplier = 24)
VCO
VCO
vco
vco
vco
vco
= 48 MHz
= 100 MHz
= 48 MHz
= 100 MHz
= 48 MHz
= 98 MHz
K30 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Table 15. MCG specifications (continued)
Mid-high range (DRS=10)
High range (DRS=11)
Low range (DRS=00)
osc_hi_1
osc_hi_1
Mid range (DRS=01)
1464 × f
2197 × f
2929 × f
732 × f
= 8 MHz, f
= 8 MHz, f
fll_ref
fll_ref
fll_ref
fll_ref
pll_ref
pll_ref
=
=
PLL
± 1.49
± 4.47
48.0
Min.
2.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Peripheral operating requirements and behaviors
23.99
47.97
71.99
95.98
1060
1350
Typ.
180
150
600
120
600
50
—
—
—
—
—
—
150 × 10
+ 1075(1/
± 2.98
± 5.97
f
Max.
pll_ref
100
4.0
—
—
—
—
—
—
—
—
—
—
—
—
1
)
-6
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ms
µA
µA
ps
ps
ps
ps
ps
%
%
s
Notes
4,
6
7
7
8
8
9
5
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